On 22-06-2026 09:17 am, Lukas Wunner wrote:
On Fri, Jun 12, 2026 at 01:37:28PM +0530, Mallesh Koujalagi wrote:
PUNIT errors can only be recovered using a power-cycle. Xe KMD
sends a uevent to notify userspace to trigger a power cycle.
On platforms where link drop caused by powering the device off and
back on is reported by hardware as a Surprise Link Down (SLD), which
AER then escalates as an Uncorrectable Fatal Error. That error fires
before the device finishes coming back up and defeats the
very recovery we are attempting.
To keep the expected, recovery-induced link drop from being raised as
a fatal AER event, mask the Surprise Link Down bit
(PCI_ERR_UNC_SURPDN) in the upstream port's AER Uncorrectable Error
Mask register before punit_error_handler() requests the cold reset.
You need to clear the Surprise Down Error Status bit in the
Uncorrectable Error Status Register after the reset.
You should also unmask the error.
Good catches, I'll clear the PCI_ERR_UNC_SURPDN status bit (W1C) after
reset completes
to drain the latched event and restore the original mask.
+ pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK,
&aer_uncorr_mask);
+ aer_uncorr_mask |= PCI_ERR_UNC_SURPDN;
+ pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK,
aer_uncorr_mask);
pci_clear_and_set_config_dword()?
Make sense, I'll switch to that helper.
OSPM is not supposed to fiddle with AER registers unless it has been
granted control of those registers through the ACPI _OSC method.
There's a pcie_aer_is_native() helper to skip access to those registers
but its only visible to the PCI core currently.
Gotcha! Happy to send a separate patch if we export pcie_aer_is_native()
helper outside PCI core.
Thanks,
-/Mallesh
Thanks,
Lukas
