Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Low] In `hw_host1x10_uclass.h`, the macro definition following `host1x_uclass_indoff_rwn_read_v` incorrectly redefines `HOST1X_UCLASS_INDOFF_INDROFFSET_F` instead of defining `HOST1X_UCLASS_INDOFF_RWN_READ_V`. --
commit 6528bd5a94c6539553c675b4b4c0ced0e30024a6 Author: Santosh BS <[email protected]> gpu: host1x: Add Tegra264 support This commit adds device data and chip headers for Tegra264. > diff --git a/drivers/gpu/host1x/hw/hw_host1x10_uclass.h > b/drivers/gpu/host1x/hw/hw_host1x10_uclass.h > new file mode 100644 > index 0000000000000..abe83e67fa837 > --- /dev/null > +++ b/drivers/gpu/host1x/hw/hw_host1x10_uclass.h [ ... ] > +static inline u32 host1x_uclass_indoff_indroffset_f(u32 v) > +{ > + return (v & 0xffff) << 2; > +} > +#define HOST1X_UCLASS_INDOFF_INDROFFSET_F(v) \ > + host1x_uclass_indoff_indroffset_f(v) > +static inline u32 host1x_uclass_indoff_rwn_read_v(void) > +{ > + return 1; > +} > +#define HOST1X_UCLASS_INDOFF_INDROFFSET_F(v) \ > + host1x_uclass_indoff_indroffset_f(v) [Severity: Low] Does this code accidentally redefine HOST1X_UCLASS_INDOFF_INDROFFSET_F? It looks like this might be a copy-paste error where HOST1X_UCLASS_INDOFF_RWN_READ_V should have been defined instead, calling host1x_uclass_indoff_rwn_read_v(). -- Sashiko AI review ยท https://sashiko.dev/#/patchset/[email protected]?part=4
