Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [High] The rcar_dsc driver ignores the `resets` property from the DT binding, failing to deassert the DSC hardware module's reset state. --
commit a8616c71b764dc9fa4ae244e47795371e7fead44 Author: Marek Vasut <[email protected]> drm/rcar-du: dsc: Add rudimentary Renesas R-Car V4H DSC driver This commit introduces a rudimentary DSC bridge driver for the Renesas R-Car V4H SoC. The driver functions as a pass-through to enable the DSI1 pipeline and performs VESA DSC encoding. > diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_dsc.c > b/drivers/gpu/drm/renesas/rcar-du/rcar_dsc.c > new file mode 100644 > index 0000000000000..362e683289d69 > --- /dev/null > +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_dsc.c [ ... ] > +static int rcar_dsc_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + struct rcar_dsc *dsc; > + int ret; > + > + dsc = devm_drm_bridge_alloc(dev, struct rcar_dsc, bridge, > + &rcar_dsc_bridge_ops); > + if (IS_ERR(dsc)) > + return PTR_ERR(dsc); > + > + platform_set_drvdata(pdev, dsc); > + > + dsc->dev = &pdev->dev; > + > + dsc->bridge.next_bridge = of_drm_get_bridge_by_endpoint(dev->of_node, > + 1, 0); [Severity: High] Does this driver fail to retrieve and deassert the DSC module's hardware reset state? If the reset control isn't retrieved and deasserted, the DSC hardware module will remain in a reset state, breaking the display pipeline functionality. It might coincidentally work if the bootloader has already deasserted the reset, but could fail on suspend/resume or when the bootloader does not initialize the display. Should the driver use devm_reset_control_get_exclusive() here and deassert the reset state during probe? > + if (IS_ERR(dsc->bridge.next_bridge)) > + return PTR_ERR(dsc->bridge.next_bridge); > + > + dsc->bridge.of_node = dev->of_node; > + > + pm_runtime_enable(&pdev->dev); > + > + ret = devm_drm_bridge_add(dev, &dsc->bridge); -- Sashiko AI review ยท https://sashiko.dev/#/patchset/[email protected]?part=6
