Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Low] The device tree example will fail `make dt_binding_check` validation due to a 64-bit `reg` property at the root level without `#address-cells = <2>` and `#size-cells = <2>`. --
commit c7b476cde050e045aaa56bae9dd7ecc7b3d34ced Author: AngeloGioacchino Del Regno <[email protected]> dt-bindings: phy: Document MT8195 and MT8196 DisplayPort PHYs This adds bindings for the DisplayPort and Embedded DisplayPort PHYs found in the MediaTek MT8195 and MT8196 SoCs. The PHY supports varying impedance calibrations for the signals to reach an optimal EYE signal pattern. > diff --git > a/Documentation/devicetree/bindings/phy/mediatek,mt8195-dp-phy.yaml > b/Documentation/devicetree/bindings/phy/mediatek,mt8195-dp-phy.yaml > new file mode 100644 > index 0000000000000..5847963a7085e > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/mediatek,mt8195-dp-phy.yaml [ ... ] > +examples: > + - | > + phy@1c500000 { > + compatible = "mediatek,mt8195-dp-phy"; > + reg = <0 0x1c500000 0 0x2000>; [Severity: Low] Looking at the examples section in mediatek,mt8195-dp-phy.yaml, will this example pass make dt_binding_check validation? The reg property contains 4 cells, but since the example node is at the root level without a parent node explicitly defining #address-cells = <2> and #size-cells = <2>, the dummy root node defaults to 1 for both. This causes the 4 cells to be parsed as 2 separate items, which violates the schema's maxItems: 1 constraint. > + #phy-cells = <0>; > + nvmem-cells = <&edp_glb_bias_trim>, <&edp_clktx_impsel>, > + <&edp_imp_ln0_pmos>, <&edp_imp_ln0_nmos>, > + <&edp_imp_ln1_pmos>, <&edp_imp_ln1_nmos>, > + <&edp_imp_ln2_pmos>, <&edp_imp_ln2_nmos>, > + <&edp_imp_ln3_pmos>, <&edp_imp_ln3_nmos>; > + nvmem-cell-names = "rbias-trim", "impedance-txclk", > + "impedance-lane0p", "impedance-lane0n", > + "impedance-lane1p", "impedance-lane1n", > + "impedance-lane2p", "impedance-lane2n", > + "impedance-lane3p", "impedance-lane3n"; > + }; -- Sashiko AI review ยท https://sashiko.dev/#/patchset/[email protected]?part=1
