Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [High] Moving the VLV/CHV DSI hardware workaround into `scanline_in_safe_range` replaces a microsecond-level busy-wait with an unconditional waitqueue sleep, causing a massive latency spike and breaking vblank evasion timing. --
commit a51b3c62707f214ae277254b37dc4aad780644a2 Author: Maarten Lankhorst <[email protected]> drm/i915/display: Handle vlv dsi workaround in scanline_in_safe_range too This commit moves the VLV/CHV DSI hardware workaround into scanline_in_safe_range(). This is intended to make the vblank evasion code slightly more deterministic by not looping with interrupts disabled. > diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c > b/drivers/gpu/drm/i915/display/intel_vblank.c > index ca08059e088ea..6f1fa952b5391 100644 > --- a/drivers/gpu/drm/i915/display/intel_vblank.c > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c > @@ -739,6 +739,24 @@ static bool scanline_in_safe_range(struct > intel_vblank_evade_ctx *evade, int *sc > else > *scanline = __intel_get_crtc_scanline(evade->crtc); > > + /* > + * On VLV/CHV DSI the scanline counter would appear to > + * increment approx. 1/3 of a scanline before start of vblank. [ ... ] > + * > + * FIXME figure out if BXT+ DSI suffers from this as well > + */ > + if (evade->need_vlv_dsi_wa && *scanline == evade->vblank_start) > + return false; [Severity: High] If this returns false because we are in the bad scanline window, will the wait_event_timeout() in intel_vblank_evade() put the thread to sleep for the timeout duration? Since the vblank interrupt fires early on these platforms and there are no subsequent interrupts for the frame, it seems this wait queue would sleep until the 1 jiffy timeout expires, rather than busy-waiting the ~10 microseconds for the scanline to pass. Could this cause the atomic commit thread to completely miss the safe window to update display registers? > + > return *scanline < evade->min || *scanline > evade->max; > } -- Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=7
