We want to map context bank 0 to SID 0 and context bank 1 to SID 1 as it makes it simpler to deal with.
Signed-off-by: Anna Maniscalco <[email protected]> --- drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index ae6152bddf8f..e605a535f328 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -225,6 +225,25 @@ static void qcom_adreno_smmu_set_prr_addr(const void *cookie, phys_addr_t page_a #define QCOM_ADRENO_SMMU_GPU_SID 0 #define QCOM_ADRENO_SMMU_LPAC_SID 1 +static bool qcom_adreno_smmu_is_lpac_device(struct device *dev) +{ + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); + int i; + + /* + * The GPU will always use SID 0 so that is a handy way to uniquely + * identify it and configure it for per-instance pagetables + */ + for (i = 0; i < fwspec->num_ids; i++) { + u16 sid = FIELD_GET(ARM_SMMU_SMR_ID, fwspec->ids[i]); + + if (sid == QCOM_ADRENO_SMMU_LPAC_SID) + return true; + } + + return false; +} + static bool qcom_adreno_smmu_is_gpu_device(struct device *dev) { struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); @@ -312,13 +331,12 @@ static int qcom_adreno_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_doma * switch pagetables */ if (qcom_adreno_smmu_is_gpu_device(dev)) { - start = 0; - count = 2; + start = !!qcom_adreno_smmu_is_lpac_device(dev); + count = start + 1; } else { start = 2; count = smmu->num_context_banks; } - return __arm_smmu_alloc_bitmap(smmu->context_map, start, count); } -- 2.54.0
