Enable HDMI 2.0 display modes (e.g. 4K@60Hz) on the Synopsys DW HDMI QP TX controller, as found in Rockchip RK3576 & RK3588 SoCs, by adding SCDC management for high TMDS clock ratio and scrambling.Since SCDC state is lost on sink disconnects, the bridge driver needs to trigger a CRTC reset during connector detection. To support this, the series introduces the connector and bridge scrambling infrastructure (patches 1-8), wires it up through the bridge connector layer with an atomic-aware detect_ctx hook (patches 9-11), then implements the SCDC scrambling feature in the DW HDMI QP bridge driver (patches 12-15). Patches 16-18 are minor cleanups in the Rockchip platform driver. Patches 19-23 improve HPD handling by deferring IRQ registration until the connector is fully initialized, adding .enable_hpd()/.disable_hpd() PHY ops, and restricting HPD events to the affected connector. Patches 24-25 convert vc4 HDMI to the common SCDC scrambling helpers as a proof of reuse, replacing the driver-local scrambling implementation. Patches 26-30 add KUnit tests: connector scrambler validation, a new 4K@60Hz 600MHz EDID, hdmi_state_helper scrambling tests, and EDID conformity fixes for some of the existing test blobs. This has been tested on the following boards: * Radxa ROCK 5B (RK3588) * Radxa ROCK 4D (RK3576) * Raspberry Pi 5 Model B Rev 1.1 (BCM2712 D0) Note that commit d87773de9efe1 ("clocksource/drivers/arm_arch_timer: Default to EL2 virtual timer when running VHE"), introduced in v7.2-rc1, causes Raspberry Pi 5 to hang during boot. Reverting the commit restores normal boot. This issue has already been reported in [1]; alternatively, the workaround proposed in [2] can be applied. Regards, Cristian [1] https://lore.kernel.org/all/[email protected]/ [2] https://lore.kernel.org/all/[email protected]/ Signed-off-by: Cristian Ciocaltea <[email protected]>
Tested on an Orangepi 5+ board (rk3588), with a 4k60 tv and a 1440p100 monitor.
To all applicable patches: Tested-by: Maud Spierings <[email protected]> Kind regards, Maud
