On Mon, 27 Apr 2026 12:08:54 +0530, Taniya Das wrote:
> This series fixes two closely related issues around GX GDSC ownership and
> rail control on A8x GPUs, where recent hardware changes and runtime PM
> interactions violate GMU and IFPC(Inter Frame Power Collapse) architectural
> expectations.
>
> Problem statement 1: Incorrect GX GDSC disable by OS
> ----------------------------------------------------
> GX GDSC is a special GPU power domain that must be exclusively controlled
> by GMU firmware during normal operation. The OS is expected to force‑
> disable GX GDSC only during GPU/GMU recovery.
>
> [...]
Applied, thanks!
[1/6] clk: qcom: gdsc: Add custom disable callback for GX GDSC
commit: 0661ee1d650facefdf61401c7d00eb96fad40b10
[2/6] clk: qcom: gxclkctl: Use custom disable callback for gx_gdsc
commit: badf361c00c802738c776fb5f4e8b08b4d0bad1c
[3/6] clk: qcom: common: ensure runtime PM suspend completes on probe
commit: a5da6c5697a50a5956ae7645e52d0007ac8b3395
[4/6] clk: qcom: gxclkctl: Remove GX/GMxC rail votes to align with IFPC
commit: 1c99638642c2137d7e699e7b2ab400df7ef15774
Best regards,
--
Bjorn Andersson <[email protected]>
