Fix checkpatch warnings preferring usleep_range over udelay. Replaced udelay() calls with usleep_range() providing a reasonable upper bound to allow the scheduler to coalesce timer interrupts.
Signed-off-by: Panagiotis Gravias <[email protected]> --- drivers/staging/fbtft/fb_ra8875.c | 4 ++-- drivers/staging/fbtft/fb_upd161704.c | 18 +++++++++--------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/staging/fbtft/fb_ra8875.c b/drivers/staging/fbtft/fb_ra8875.c index 0ab1de6647d0..d2400bb44f1c 100644 --- a/drivers/staging/fbtft/fb_ra8875.c +++ b/drivers/staging/fbtft/fb_ra8875.c @@ -210,7 +210,7 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) } len--; - udelay(100); + usleep_range(100, 200); if (len) { buf = (u8 *)par->buf; @@ -231,7 +231,7 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) /* restore user spi-speed */ par->fbtftops.write = fbtft_write_spi; - udelay(100); + usleep_range(100, 200); } static int write_vmem16_bus8(struct fbtft_par *par, size_t offset, size_t len) diff --git a/drivers/staging/fbtft/fb_upd161704.c b/drivers/staging/fbtft/fb_upd161704.c index c680160d6380..e26766f58a50 100644 --- a/drivers/staging/fbtft/fb_upd161704.c +++ b/drivers/staging/fbtft/fb_upd161704.c @@ -32,27 +32,27 @@ static int init_display(struct fbtft_par *par) /* oscillator start */ write_reg(par, 0x003A, 0x0001); /*Oscillator 0: stop, 1: operation */ - udelay(100); + usleep_range(100, 200); /* y-setting */ write_reg(par, 0x0024, 0x007B); /* amplitude setting */ - udelay(10); + usleep_range(10, 20); write_reg(par, 0x0025, 0x003B); /* amplitude setting */ write_reg(par, 0x0026, 0x0034); /* amplitude setting */ - udelay(10); + usleep_range(10, 20); write_reg(par, 0x0027, 0x0004); /* amplitude setting */ write_reg(par, 0x0052, 0x0025); /* circuit setting 1 */ - udelay(10); + usleep_range(10, 20); write_reg(par, 0x0053, 0x0033); /* circuit setting 2 */ write_reg(par, 0x0061, 0x001C); /* adjustment V10 positive polarity */ - udelay(10); + usleep_range(10, 20); write_reg(par, 0x0062, 0x002C); /* adjustment V9 negative polarity */ write_reg(par, 0x0063, 0x0022); /* adjustment V34 positive polarity */ - udelay(10); + usleep_range(10, 20); write_reg(par, 0x0064, 0x0027); /* adjustment V31 negative polarity */ - udelay(10); + usleep_range(10, 20); write_reg(par, 0x0065, 0x0014); /* adjustment V61 negative polarity */ - udelay(10); + usleep_range(10, 20); write_reg(par, 0x0066, 0x0010); /* adjustment V61 negative polarity */ /* Basical clock for 1 line (BASECOUNT[7:0]) number specified */ @@ -60,7 +60,7 @@ static int init_display(struct fbtft_par *par) /* Power supply setting */ write_reg(par, 0x0019, 0x0000); /* DC/DC output setting */ - udelay(200); + usleep_range(200, 300); write_reg(par, 0x001A, 0x1000); /* DC/DC frequency setting */ write_reg(par, 0x001B, 0x0023); /* DC/DC rising setting */ write_reg(par, 0x001C, 0x0C01); /* Regulator voltage setting */ -- 2.55.0
