drm_atomic_helper_connector_hdmi_check() rejects modes whose computed TMDS character rate exceeds the connector limit before invoking the driver's .tmds_char_rate_valid() hook.
BCM2835 is capped at 162 MHz, slightly below the 165 MHz limit of HDMI 1.2. Set supported_tmds_char_rate in vc4_hdmi_connector_funcs_hdmi10 so that the limit inferred from supported_hdmi_ver is overridden by the lower hardware constraint. All other chip variants rely on the standard HDMI 1.4/2.0 limits, so the default validation suffices. This allows vc4_hdmi_connector_clock_valid() to be simplified by dropping the now-redundant max_pixel_clock field from struct vc4_hdmi_variant. Signed-off-by: Cristian Ciocaltea <[email protected]> --- drivers/gpu/drm/vc4/vc4_hdmi.c | 10 +--------- drivers/gpu/drm/vc4/vc4_hdmi.h | 3 --- 2 files changed, 1 insertion(+), 12 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index ec0c1f4224d7..12d0adc3cb1f 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -1528,12 +1528,8 @@ vc4_hdmi_connector_clock_valid(const struct drm_connector *connector, const struct drm_display_mode *mode, unsigned long long clock) { - const struct vc4_hdmi *vc4_hdmi = connector_to_vc4_hdmi(connector); struct vc4_dev *vc4 = to_vc4_dev(connector->dev); - if (clock > vc4_hdmi->variant->max_pixel_clock) - return MODE_CLOCK_HIGH; - if (!vc4->hvs->vc5_hdmi_enable_hdmi_20 && clock > HDMI_1_3_TMDS_CHAR_RATE_MAX_HZ) return MODE_CLOCK_HIGH; @@ -1578,6 +1574,7 @@ static const struct drm_connector_hdmi_funcs vc4_hdmi_connector_funcs_hdmi12 = { VC4_HDMI_CONNECTOR_FUNCS_COMMON, .max_bpc = 8, .supported_hdmi_ver = HDMI_VERSION_1_2, + .supported_tmds_char_rate = 162000000, }; static const struct drm_connector_hdmi_funcs vc4_hdmi_connector_funcs_hdmi14 = { @@ -3184,7 +3181,6 @@ static const struct vc4_hdmi_variant bcm2835_variant = { .encoder_type = VC4_ENCODER_TYPE_HDMI0, .debugfs_name = "hdmi_regs", .card_name = "vc4-hdmi", - .max_pixel_clock = 162000000, .registers = vc4_hdmi_fields, .num_registers = ARRAY_SIZE(vc4_hdmi_fields), @@ -3204,7 +3200,6 @@ static const struct vc4_hdmi_variant bcm2711_hdmi0_variant = { .encoder_type = VC4_ENCODER_TYPE_HDMI0, .debugfs_name = "hdmi0_regs", .card_name = "vc4-hdmi-0", - .max_pixel_clock = HDMI_2_0_TMDS_CHAR_RATE_MAX_HZ, .registers = vc5_hdmi_hdmi0_fields, .num_registers = ARRAY_SIZE(vc5_hdmi_hdmi0_fields), .phy_lane_mapping = { @@ -3233,7 +3228,6 @@ static const struct vc4_hdmi_variant bcm2711_hdmi1_variant = { .encoder_type = VC4_ENCODER_TYPE_HDMI1, .debugfs_name = "hdmi1_regs", .card_name = "vc4-hdmi-1", - .max_pixel_clock = HDMI_1_3_TMDS_CHAR_RATE_MAX_HZ, .registers = vc5_hdmi_hdmi1_fields, .num_registers = ARRAY_SIZE(vc5_hdmi_hdmi1_fields), .phy_lane_mapping = { @@ -3262,7 +3256,6 @@ static const struct vc4_hdmi_variant bcm2712_hdmi0_variant = { .encoder_type = VC4_ENCODER_TYPE_HDMI0, .debugfs_name = "hdmi0_regs", .card_name = "vc4-hdmi-0", - .max_pixel_clock = HDMI_2_0_TMDS_CHAR_RATE_MAX_HZ, .registers = vc6_hdmi_hdmi0_fields, .num_registers = ARRAY_SIZE(vc6_hdmi_hdmi0_fields), .phy_lane_mapping = { @@ -3289,7 +3282,6 @@ static const struct vc4_hdmi_variant bcm2712_hdmi1_variant = { .encoder_type = VC4_ENCODER_TYPE_HDMI1, .debugfs_name = "hdmi1_regs", .card_name = "vc4-hdmi-1", - .max_pixel_clock = HDMI_2_0_TMDS_CHAR_RATE_MAX_HZ, .registers = vc6_hdmi_hdmi1_fields, .num_registers = ARRAY_SIZE(vc6_hdmi_hdmi1_fields), .phy_lane_mapping = { diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h index f6159c9e6144..61486e7b4ba2 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.h +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h @@ -29,9 +29,6 @@ struct vc4_hdmi_variant { /* Filename to expose the registers in debugfs */ const char *debugfs_name; - /* Maximum pixel clock supported by the controller (in Hz) */ - unsigned long long max_pixel_clock; - /* List of the registers available on that variant */ const struct vc4_hdmi_register *registers; -- 2.55.0
