On Sun, 09 Aug 2026 21:14:13 +0800, Cody Kang wrote: > The APMU's eDP pixel-clock muxes select the DP PHY PLLs as parents, so the > K3 syscon takes two clock inputs the other variants do not have. > > Gate them behind the K3 compatible instead of widening the shared clock > list, so a non-K3 syscon cannot silently accept clocks it has no mux for. > > Signed-off-by: Cody Kang <[email protected]> > > --- > v2: > - drop the redundant minItems: 4; four is already the minimum > (Rob Herring) > --- > .../bindings/soc/spacemit/spacemit,k1-syscon.yaml | 21 > ++++++++++++++++++++- > 1 file changed, 20 insertions(+), 1 deletion(-) >
Reviewed-by: Rob Herring (Arm) <[email protected]>
