чт, 25 черв. 2026 р. о 11:25 Svyatoslav Ryhel <[email protected]> пише: > > After tc358768_setup_pll() enables PLL_CKEN and the lock indicator comes > up, the DSI register sequence runs near immediately. On TF700T this > results in the bridge claiming PLL lock but producing no DSI video output: > the panel powers up, the backlight comes on, but the framebuffer is never > scanned out. > > Insert a small settling delay between PLL setup and the rest of the > attach. > > --- > - switched sleep() > delay() since *_pre_enable() is atomic > --- > > Svyatoslav Ryhel (1): > gpu/drm: bridge: tc358768: Add delay after PLL setup > > drivers/gpu/drm/bridge/tc358768.c | 3 +++ > 1 file changed, 3 insertions(+) > > -- > 2.53.0 >
Hello there! If no one objects, may this patch be applied? It is quite important for ASUS TF700T to work properly. Thank you!
