In the CPU->GSP messaging path, the code reads the read pointer from GSP, writes the command, advances the write pointer, and then notifies the GSP.
A LOAD->STORE ordering is needed after reading the read pointer from GSP and writing the command. Control dependency exists here which provide the needed ordering, but it's best to avoid depending on it. A STORE->STORE ordering is needed after the command write and before the write pointer advance. This is currently incorrectly done after the write pointer advance (and before GSP notification), but this can cause issue if GSP is still processing ring buffer, as it may observe the write pointer advance before command write. Thus move this barrier to be before the write pointer advance. Note that barriers are not needed between write pointer advance and GSP notification, as MMIO accessors already carries the required barrier. Signed-off-by: Gary Guo <[email protected]> --- drivers/gpu/nova-core/gsp/cmdq.rs | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/nova-core/gsp/cmdq.rs b/drivers/gpu/nova-core/gsp/cmdq.rs index 6da728201281..bfd61e678802 100644 --- a/drivers/gpu/nova-core/gsp/cmdq.rs +++ b/drivers/gpu/nova-core/gsp/cmdq.rs @@ -27,6 +27,11 @@ ptr, sync::{ aref::ARef, + barrier::{ + dma_mb, + Full, + Write, // + }, Mutex, // }, time::Delta, @@ -413,7 +418,12 @@ fn gsp_write_ptr(&self) -> u32 { // // - The returned value is within `0..MSGQ_NUM_PAGES`. fn gsp_read_ptr(&self) -> u32 { - MsgqRxHeader::read_ptr(io_project!(self.0, .gspq.rx)) % MSGQ_NUM_PAGES + let ptr = MsgqRxHeader::read_ptr(io_project!(self.0, .gspq.rx)) % MSGQ_NUM_PAGES; + + // ORDERING: LOAD->STORE ordering needed to order `gsp_read_ptr` read before data write. + dma_mb(Full); + + ptr } // Returns the index of the memory page the CPU can read the next message from. @@ -447,12 +457,12 @@ fn cpu_write_ptr(&self) -> u32 { // Informs the GSP that it can process `elem_count` new pages from the command queue. fn advance_cpu_write_ptr(&mut self, elem_count: u32) { + // ORDERING: STORE->STORE ordering needed to order `cpu_write_ptr` write after data write. + dma_mb(Write); + let tx = io_project!(self.0, .cpuq.tx); let wptr = MsgqTxHeader::write_ptr(tx).wrapping_add(elem_count) % MSGQ_NUM_PAGES; MsgqTxHeader::set_write_ptr(tx, wptr); - - // Ensure all command data is visible before triggering the GSP read. - fence(Ordering::SeqCst); } } -- 2.54.0
