From: Joel Fernandes <[email protected]> Add the Virtual Memory Manager (VMM) infrastructure for GPU address space management. Each Vmm instance manages a single address space identified by its Page Directory Base (PDB) address, used for Channel, BAR1 and BAR2 mappings.
Mapping APIs and virtual address range tracking are added in later commits. Signed-off-by: Joel Fernandes <[email protected]> [ecourtney: pass mutable GpuMm to mapping lookup] Signed-off-by: Eliot Courtney <[email protected]> --- drivers/gpu/nova-core/mm.rs | 1 + drivers/gpu/nova-core/mm/vmm.rs | 58 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 59 insertions(+) diff --git a/drivers/gpu/nova-core/mm.rs b/drivers/gpu/nova-core/mm.rs index 377cc9d44702..2cf37254fbb9 100644 --- a/drivers/gpu/nova-core/mm.rs +++ b/drivers/gpu/nova-core/mm.rs @@ -65,6 +65,7 @@ macro_rules! impl_pfn_bounded { mod pramin; mod regs; pub(super) mod tlb; +pub(super) mod vmm; /// GPU Memory Manager - owns all core MM components. /// diff --git a/drivers/gpu/nova-core/mm/vmm.rs b/drivers/gpu/nova-core/mm/vmm.rs new file mode 100644 index 000000000000..a7911efb65a0 --- /dev/null +++ b/drivers/gpu/nova-core/mm/vmm.rs @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: GPL-2.0 + +//! Virtual Memory Manager for NVIDIA GPU page table management. +//! +//! The [`Vmm`] provides high-level page mapping and unmapping operations for GPU +//! virtual address spaces (Channels, BAR1, BAR2). It wraps the page table walker +//! and handles TLB flushing after modifications. + +use kernel::{ + gpu::buddy::AllocatedBlocks, + prelude::*, // +}; + +use crate::mm::{ + pagetable::{ + walk::{PtWalk, WalkResult}, + MmuVersion, // + }, + GpuMm, + Pfn, + Vfn, + VramAddress, // +}; + +/// Virtual Memory Manager for a GPU address space. +/// +/// Each [`Vmm`] instance manages a single address space identified by its Page +/// Directory Base (`PDB`) address. The [`Vmm`] is used for Channel, BAR1 and +/// BAR2 mappings. +pub(crate) struct Vmm { + /// Page Directory Base address for this address space. + pdb_addr: VramAddress, + /// MMU version used for page table layout. + mmu_version: MmuVersion, + /// Page table allocations required for mappings. + page_table_allocs: KVec<Pin<KBox<AllocatedBlocks>>>, +} + +impl Vmm { + /// Create a new [`Vmm`] for the given Page Directory Base address. + pub(crate) fn new(pdb_addr: VramAddress, mmu_version: MmuVersion) -> Result<Self> { + Ok(Self { + pdb_addr, + mmu_version, + page_table_allocs: KVec::new(), + }) + } + + /// Read the [`Pfn`] for a mapped [`Vfn`] if one is mapped. + pub(super) fn read_mapping(&self, mm: &mut GpuMm<'_>, vfn: Vfn) -> Result<Option<Pfn>> { + let walker = PtWalk::new(self.pdb_addr, self.mmu_version); + + match walker.walk_to_pte(mm, vfn)? { + WalkResult::Mapped { pfn, .. } => Ok(Some(pfn)), + WalkResult::Unmapped { .. } | WalkResult::PageTableMissing => Ok(None), + } + } +} -- 2.55.0
