On 9/8/2026 6:54 PM, Neil Armstrong wrote:
> The a750 uses the CX AO Counters instead of the GMU_ALWAYS_ON_COUNTER
> register on A6xx and other A7xx GPUs, use it when running a A750 GPU.
Do you see any difference in behavior? Both counters are synchronized.
-Akhil.
>
> Signed-off-by: Neil Armstrong <[email protected]>
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 +++++++++---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> index f9de9329dee3..081e79ea4652 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> @@ -23,9 +23,15 @@ static u64 a6xx_gmu_get_timestamp(struct msm_gpu *gpu)
> u64 count_hi, count_lo, temp;
>
> do {
> - count_hi = gmu_read(&a6xx_gpu->gmu,
> REG_A6XX_GMU_ALWAYS_ON_COUNTER_H);
> - count_lo = gmu_read(&a6xx_gpu->gmu,
> REG_A6XX_GMU_ALWAYS_ON_COUNTER_L);
> - temp = gmu_read(&a6xx_gpu->gmu,
> REG_A6XX_GMU_ALWAYS_ON_COUNTER_H);
> + if (adreno_is_a750_family(adreno_gpu)) {
> + count_hi = gmu_read(&a6xx_gpu->gmu,
> REG_A7XX_GMU_CX_AO_COUNTER_H);
> + count_lo = gmu_read(&a6xx_gpu->gmu,
> REG_A7XX_GMU_CX_AO_COUNTER_L);
> + temp = gmu_read(&a6xx_gpu->gmu,
> REG_A7XX_GMU_CX_AO_COUNTER_H);
> + } else {
> + count_hi = gmu_read(&a6xx_gpu->gmu,
> REG_A6XX_GMU_ALWAYS_ON_COUNTER_H);
> + count_lo = gmu_read(&a6xx_gpu->gmu,
> REG_A6XX_GMU_ALWAYS_ON_COUNTER_L);
> + temp = gmu_read(&a6xx_gpu->gmu,
> REG_A6XX_GMU_ALWAYS_ON_COUNTER_H);
> + }
> } while (unlikely(count_hi != temp));
>
> return (count_hi << 32) | count_lo;
>
