Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [High] The compatible strings for MT8186, MT8192, and MT8195 incorrectly fall back to `mediatek,mt8173-disp-wdma`, forcing 32-bit DMA limitations on 34-bit capable hardware and causing DMA address truncation. --
commit 7d14f8135e7ea9f9404cdd835d6b860fc5b97644 Author: AngeloGioacchino Del Regno <[email protected]> dt-bindings: display: mediatek: wdma: Add compatibles for more SoCs This commit adds compatible strings for the Write DMA hardware in several MediaTek SoCs. It specifically notes that MT6893 is not compatible with MT8173 because it supports destination addresses larger than 32 bits. > diff --git > a/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml > b/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml > index 97d052b0fb614..c3ed867d058d9 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml > @@ -22,11 +22,16 @@ properties: > compatible: > oneOf: > - enum: > + - mediatek,mt6893-disp-wdma > - mediatek,mt8173-disp-wdma > - items: > - enum: > - mediatek,mt6795-disp-wdma > - mediatek,mt8167-disp-wdma > + - mediatek,mt8183-disp-wdma > + - mediatek,mt8186-disp-wdma > + - mediatek,mt8192-disp-wdma > + - mediatek,mt8195-disp-wdma > - const: mediatek,mt8173-disp-wdma [Severity: High] Does declaring MT8186, MT8192, and MT8195 as compatible with MT8173 cause DMA address truncation on these SoCs? The commit message notes that MT6893 is not compatible with MT8173 because it has support for destination addresses larger than 32 bits. However, the IOMMU driver for MT8186, MT8192, and MT8195 enables IOVA_34_EN for their multimedia domains, which sets the DMA mask to 34 bits. By declaring a fallback to mediatek,mt8173-disp-wdma in the device tree, the OS binds the device using mt8173_wdma_driver_data, which initializes reg_wdma_dst_addr0_msb to 0. This causes mtk_wdma_ddp_write_dst_addr() to silently truncate the 34-bit IOVA by dropping the upper 32 bits, leading to the WDMA hardware writing to the wrong memory address when buffers are mapped above the 4GB boundary. Should these SoCs be grouped without the mediatek,mt8173-disp-wdma fallback? -- Sashiko AI review ยท https://sashiko.dev/#/patchset/[email protected]?part=12
