On Wed, Oct 26, 2011 at 3:43 PM, Ilija Hadzic
<ihadzic at research.bell-labs.com> wrote:
> radeon_driver_irq_preinstall_kms and radeon_driver_irq_uninstall_kms
> hard code the loop to 6 which happens to be the current maximum
> number of crtcs and hpd pins; if one day an ASIC with more crtcs
> (or hpd pins) comes out, this is a trouble waiting to happen.
>
> introduce constants for maximum CRTC count, maximum HPD pins count
> and maximum HDMI blocks count (per FIXME in radeon_irq structure)
> and correct the loops in radeon_driver_irq_preinstall_kms and
> radeon_driver_irq_uninstall_kms
>
> v2: take care of goofs pointed out by Alex Deucher
>
> Signed-off-by: Ilija Hadzic <ihadzic at research.bell-labs.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> ?drivers/gpu/drm/radeon/radeon.h ? ? ? ? | ? 19 ++++++++++---------
> ?drivers/gpu/drm/radeon/radeon_irq_kms.c | ? 12 ++++++------
> ?2 files changed, 16 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index 156b8b7..c6841fd 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -437,25 +437,26 @@ union radeon_irq_stat_regs {
> ? ? ? ?struct evergreen_irq_stat_regs evergreen;
> ?};
>
> +#define RADEON_MAX_HPD_PINS 6
> +#define RADEON_MAX_CRTCS 6
> +#define RADEON_MAX_HDMI_BLOCKS 2
> +
> ?struct radeon_irq {
> ? ? ? ?bool ? ? ? ? ? ?installed;
> ? ? ? ?bool ? ? ? ? ? ?sw_int;
> - ? ? ? /* FIXME: use a define max crtc rather than hardcode it */
> - ? ? ? bool ? ? ? ? ? ?crtc_vblank_int[6];
> - ? ? ? bool ? ? ? ? ? ?pflip[6];
> + ? ? ? bool ? ? ? ? ? ?crtc_vblank_int[RADEON_MAX_CRTCS];
> + ? ? ? bool ? ? ? ? ? ?pflip[RADEON_MAX_CRTCS];
> ? ? ? ?wait_queue_head_t ? ? ? vblank_queue;
> - ? ? ? /* FIXME: use defines for max hpd/dacs */
> - ? ? ? bool ? ? ? ? ? ?hpd[6];
> + ? ? ? bool ? ? ? ? ? ?hpd[RADEON_MAX_HPD_PINS];
> ? ? ? ?bool ? ? ? ? ? ?gui_idle;
> ? ? ? ?bool ? ? ? ? ? ?gui_idle_acked;
> ? ? ? ?wait_queue_head_t ? ? ? idle_queue;
> - ? ? ? /* FIXME: use defines for max HDMI blocks */
> - ? ? ? bool ? ? ? ? ? ?hdmi[2];
> + ? ? ? bool ? ? ? ? ? ?hdmi[RADEON_MAX_HDMI_BLOCKS];
> ? ? ? ?spinlock_t sw_lock;
> ? ? ? ?int sw_refcount;
> ? ? ? ?union radeon_irq_stat_regs stat_regs;
> - ? ? ? spinlock_t pflip_lock[6];
> - ? ? ? int pflip_refcount[6];
> + ? ? ? spinlock_t pflip_lock[RADEON_MAX_CRTCS];
> + ? ? ? int pflip_refcount[RADEON_MAX_CRTCS];
> ?};
>
> ?int radeon_irq_kms_init(struct radeon_device *rdev);
> diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c
> b/drivers/gpu/drm/radeon/radeon_irq_kms.c
> index 9ec830c..93da855 100644
> --- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
> +++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
> @@ -67,10 +67,10 @@ void radeon_driver_irq_preinstall_kms(struct drm_device
> *dev)
> ? ? ? ?/* Disable *all* interrupts */
> ? ? ? ?rdev->irq.sw_int = false;
> ? ? ? ?rdev->irq.gui_idle = false;
> - ? ? ? for (i = 0; i < rdev->num_crtc; i++)
> - ? ? ? ? ? ? ? rdev->irq.crtc_vblank_int[i] = false;
> - ? ? ? for (i = 0; i < 6; i++) {
> + ? ? ? for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
> ? ? ? ? ? ? ? ?rdev->irq.hpd[i] = false;
> + ? ? ? for (i = 0; i < RADEON_MAX_CRTCS; i++) {
> + ? ? ? ? ? ? ? rdev->irq.crtc_vblank_int[i] = false;
> ? ? ? ? ? ? ? ?rdev->irq.pflip[i] = false;
> ? ? ? ?}
> ? ? ? ?radeon_irq_set(rdev);
> @@ -99,10 +99,10 @@ void radeon_driver_irq_uninstall_kms(struct drm_device
> *dev)
> ? ? ? ?/* Disable *all* interrupts */
> ? ? ? ?rdev->irq.sw_int = false;
> ? ? ? ?rdev->irq.gui_idle = false;
> - ? ? ? for (i = 0; i < rdev->num_crtc; i++)
> - ? ? ? ? ? ? ? rdev->irq.crtc_vblank_int[i] = false;
> - ? ? ? for (i = 0; i < 6; i++) {
> + ? ? ? for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
> ? ? ? ? ? ? ? ?rdev->irq.hpd[i] = false;
> + ? ? ? for (i = 0; i < RADEON_MAX_CRTCS; i++) {
> + ? ? ? ? ? ? ? rdev->irq.crtc_vblank_int[i] = false;
> ? ? ? ? ? ? ? ?rdev->irq.pflip[i] = false;
> ? ? ? ?}
> ? ? ? ?radeon_irq_set(rdev);
> --
> 1.7.7
>
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