Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] drm/bridge: synopsys: missing clear before updating VTEM EMP packet --
commit f01e70b0b31bb2936c32cbd70054c3941b7363a9 Author: Derek Foreman <[email protected]> drm/bridge: synopsys: Add VTEM EMP support Add code to pack and schedule VTEM EMPs. > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c > b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c > --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c > +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c [ ... ] > @@ -775,6 +784,42 @@ static int dw_hdmi_qp_bridge_write_spd_infoframe(struct > drm_bridge *bridge, > return 0; > } > > +static int dw_hdmi_qp_bridge_write_vtem_emp(struct drm_bridge *bridge, > + const u8 *buffer, size_t len) > +{ > + struct dw_hdmi_qp *hdmi = bridge->driver_private; > + u32 val, i; > + > + if (len != HDMI_INFOFRAME_SIZE(VTEM)) { > + dev_err(hdmi->dev, "unsupported vtem emp packet size of %zu\n", > len); > + return -EINVAL; > + } > + > + val = buffer[1] << 8 | buffer[2] << 16; > + dw_hdmi_qp_write(hdmi, val, PKT_EMP_VTEM_CONTENTS0); [Severity: Medium] Should dw_hdmi_qp_bridge_clear_vtem_emp() be called here before writing the new packet contents to the hardware registers? The DRM HDMI state helper does not automatically call the clear function before writing when updating an existing frame. Modifying the packet scheduler contents across multiple register writes while transmission is active might cause a hardware race condition, where the hardware could transmit a torn VTEM EMP packet containing a mix of old and new data. This could result in transient glitches or desynchronization in the sink's VRR state. Other infoframe writers in this driver, such as dw_hdmi_qp_bridge_write_spd_infoframe(), explicitly call their respective clear functions before writing new contents. -- Sashiko AI review ยท https://sashiko.dev/#/patchset/[email protected]?part=8
