Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Low] drm/i915: build failure due to missing vrr qualifier for cmrr --
commit 040a3a223ae954dab43478f6da5edfc88f5ff693 Author: Xizhe Tang <[email protected]> drm/i915/dp: Only send AS SDP when VRR/CMRR is enabled or PR !async This commit alters the condition for sending the Adaptive-Sync SDP by checking explicitly for VRR or CMRR enablement in the CRTC state. This prevents vertical streaking on eDP panels that advertise VRR but run at fixed refresh rates. Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9252 > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 0cd5e6b5034cf..612bc2846475b 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -3111,7 +3111,8 @@ static bool intel_dp_needs_as_sdp(struct intel_dp > *intel_dp, > !intel_psr_pr_async_video_timing_supported(intel_dp)) > return true; > > - return intel_vrr_possible(crtc_state); > + return crtc_state->vrr.enable || > + crtc_state->cmrr.enable; [Severity: Low] Does this cause a compilation error in intel_dp_needs_as_sdp()? Looking at the definition of intel_crtc_state in drivers/gpu/drm/i915/display/intel_display_types.h, cmrr is nested inside vrr: struct intel_crtc_state { ... struct { ... /* Content Match Refresh Rate state */ struct { bool enable; u64 cmrr_n, cmrr_m; } cmrr; } vrr; ... }; Because cmrr is nested, accessing it directly via crtc_state->cmrr.enable will fail to compile. Should this be accessed as crtc_state->vrr.cmrr.enable instead, similar to how it is checked in intel_dp_compute_as_sdp() further down in this same file? -- Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1
