On 9/24/26 14:43, Pierre-Eric Pelloux-Prayer wrote: > For unknown reasons, on gfx12 using multiple entities can causes > random corruption of BOs with DCC. > This workaround seems to prevent the issue until the root cause > is understood and fixed. > > Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/5663 > Fixes: 3a6f6eeb3db5 ("drm/amdgpu: give ttm entities access to all the sdma > scheds") > Signed-off-by: Pierre-Eric Pelloux-Prayer <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > index 3d620ec2937f..a826e091ea58 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > @@ -2392,6 +2392,11 @@ void amdgpu_ttm_enable_buffer_funcs(struct > amdgpu_device *adev) > > num_clear_entities = MIN(adev->mman.num_buffer_funcs_scheds, > TTM_NUM_MOVE_FENCES); > num_move_entities = MIN(adev->mman.num_buffer_funcs_scheds, > TTM_NUM_MOVE_FENCES); > + /* TODO: workaround for DCC corruption when moving BOs from multiple > queues at > + * the same time: use a single queue until the root cause is > identified and fixed. > + */ > + if (IP_VERSION_MAJ(amdgpu_ip_version(adev, SDMA0_HWIP, 0)) == 7)
Thinking it through it would be nice if we could check for that DCC HW generation instead of the SDMA version. But we need a fix ASAP so the patch is Reviewed-by: Christian König <[email protected]>. Regards, Christian. > + num_move_entities = 1; > > adev->mman.clear_entities = kcalloc(num_clear_entities, > sizeof(struct > amdgpu_ttm_buffer_entity),
