v_HSYNC_POLARITY() and v_VSYNC_POLARITY() write the wrong bits: the
hardware puts HSYNC in bit 2 and VSYNC in bit 3, the macros do the
opposite. Most CEA modes drive both syncs with the same polarity so it
goes unnoticed; it only shows up on modes where the two differ.
Fixes: 412d4ae6b7a5 ("drm/rockchip: hdmi: add Innosilicon HDMI support")
Reported-by: Maud Spierings <[email protected]>
Closes:
https://lore.kernel.org/all/[email protected]/
Reported-by: Byron Stanoszek <[email protected]>
Closes:
https://lore.kernel.org/all/[email protected]/
Suggested-by: Dominique Belhachemi <[email protected]>
Signed-off-by: Michal Wilczynski <[email protected]>
---
drivers/gpu/drm/bridge/inno-hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/inno-hdmi.c
b/drivers/gpu/drm/bridge/inno-hdmi.c
index
dd35f5a875d3d842fee6d2ead0de88503f9914e1..d7c33b92e2ddf4ced84d17304463f44be52270b8
100644
--- a/drivers/gpu/drm/bridge/inno-hdmi.c
+++ b/drivers/gpu/drm/bridge/inno-hdmi.c
@@ -122,8 +122,8 @@ enum {
#define v_VIDEO_MUTE(n) ((n) << 0)
#define HDMI_VIDEO_TIMING_CTL 0x08
-#define v_HSYNC_POLARITY(n) ((n) << 3)
-#define v_VSYNC_POLARITY(n) ((n) << 2)
+#define v_VSYNC_POLARITY(n) ((n) << 3)
+#define v_HSYNC_POLARITY(n) ((n) << 2)
#define v_INETLACE(n) ((n) << 1)
#define v_EXTERANL_VIDEO(n) ((n) << 0)
--
2.34.1
