On Thu, Sep 17, 2026 at 11:12:38AM +0530, Nabige Aala wrote: > > On 9/17/2026 7:06 AM, Shawn Guo wrote: > > On Fri, Sep 11, 2026 at 09:06:34PM +0530, Nabige Aala wrote: > > > From: Mahadevan P <[email protected]> > > > > > > Add the binding for the display subsystem (MDSS) found on the Qualcomm > > > Nord SoC. Nord is MDSS 12.1, DP-only (no DSI), with two independent DP > > > controllers. > > > > > > Signed-off-by: Mahadevan P <[email protected]> > > > Signed-off-by: Nabige Aala <[email protected]> > > > --- > > > .../bindings/display/msm/qcom,nord-mdss.yaml | 98 > > > ++++++++++++++++++++++ > > > 1 file changed, 98 insertions(+) > > > > > > diff --git > > > a/Documentation/devicetree/bindings/display/msm/qcom,nord-mdss.yaml > > > b/Documentation/devicetree/bindings/display/msm/qcom,nord-mdss.yaml > > > new file mode 100644 > > > index 000000000000..0b0cacdca9db > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/display/msm/qcom,nord-mdss.yaml > > > @@ -0,0 +1,98 @@ > > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/display/msm/qcom,nord-mdss.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: Qualcomm Nord display subsystem (MDSS) > > > + > > > +maintainers: > > > + - Mahadevan P <[email protected]> > > > + > > > +description: > > > + Nord display subsystem consists of MDSS (display controller), DPU 1499A > > > + (display processing unit), and display interface controllers (DP only, > > > no DSI). > > > + This is MDSS 12.1, DP-only, with 2 independent DP controllers. > > > + > > > +$ref: /schemas/display/msm/mdss-common.yaml# > > > + > > > +properties: > > > + compatible: > > > + const: qcom,nord-mdss > > > + > > > + clocks: > > > + items: > > > + - description: Display AHB > > > + - description: Display hf AXI > > > + - description: Display core > > > + > > > + clock-names: > > > + items: > > > + - const: iface > > > + - const: bus > > > + - const: core > > > + > > > + iommus: > > > + maxItems: 1 > > The DTS in downstream repository doesn't seem to agree. There is two > > items for iommus. > > I checked the Nord IPCAT. the resulted SID is same for both the SID (i.e. > 0x03e0) in downstream repository. > > I think we should update the downstream DT and use a single SID entry. > > > > + > > > + interconnects: > > > + items: > > > + - description: Interconnect path from mdp0 port to the data bus > > > + - description: Interconnect path from CPU to the reg bus > > > + > > > + interconnect-names: > > > + items: > > > + - const: mdp0-mem > > > + - const: cpu-cfg > > > + > > > +patternProperties: > > > + "^display-controller@[0-9a-f]+$": > > > + type: object > > > + additionalProperties: true > > > + properties: > > > + compatible: > > > + const: qcom,nord-dpu > > > + > > > + "^displayport-controller@[0-9a-f]+$": > > > + type: object > > > + additionalProperties: true > > > + properties: > > > + compatible: > > > + const: qcom,nord-dp > > > + > > > + "^phy@[0-9a-f]+$": > > > + type: object > > > + additionalProperties: true > > > + properties: > > > + compatible: > > > + const: qcom,nord-dp-phy > > > + > > > +required: > > > + - compatible > > > + > > > +unevaluatedProperties: false > > > + > > > +examples: > > > + - | > > > + #include <dt-bindings/clock/qcom,dispcc-nord.h> > > Please run dt_binding_check against mainline kernel where the header is > > actually qcom,nord-dispcc.h. > > Ack, I will update according to mainline kernel.
Just drop the header from the bindings and use ephemeral clocks and resets. -- With best wishes Dmitry
