On DPU < 5.0 each interface is driven by its own CTL, which has to control all the mixers feeding that interface. However dpu_crtc_assign_resources() gives a single mixer to each of the CTLs but the last one, which gets all the remaining mixers. This works while there is at most one mixer per interface, but it breaks with four mixers driving two interfaces: the first CTL would get LM_0 only, while LM_1 would be programmed through the CTL of the second interface together with LM_2 and LM_5, leaving the first interface with a half of its picture.
Split the mixers evenly, so that each CTL gets the mixers of its interface. Nothing changes for the existing topologies. Assisted-by: LLM Signed-off-by: Dmitry Baryshkov <[email protected]> --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 828187f46eae..57f50a3cd9cf 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -1469,7 +1469,7 @@ static int dpu_crtc_assign_resources(struct drm_crtc *crtc, ARRAY_SIZE(hw_dspp)); for (i = 0; i < num_lm; i++) { - int ctl_idx = (i < num_ctl) ? i : (num_ctl-1); + int ctl_idx = i * num_ctl / num_lm; cstate->mixers[i].hw_lm = to_dpu_hw_mixer(hw_lm[i]); cstate->mixers[i].lm_ctl = to_dpu_hw_ctl(hw_ctl[ctl_idx]); -- 2.47.3
