Hi Cristian, On Mon Oct 5, 2026 at 2:38 AM CEST, Cristian Ciocaltea wrote: > A NACK or timeout on the DDC bus is a normal condition when the sink is > absent or unpowered. Some displays keep HPD asserted and the EDID > EEPROM readable while in standby, but leave the SCDC slave unpowered. > This results in i2c-related error messages on every boot during > scrambling setup, even though the condition is handled gracefully and > the SCDC configuration is restored on the next hotplug event. > > Log the i2c bus level failures with dev_dbg_ratelimited() instead, > matching the silent behaviour of the non-QP dw-hdmi i2c bus algorithm.
I can confirm that with this patch I no longer see warnings like this: dwhdmiqp-rockchip fde80000.hdmi: i2c read error dwhdmiqp-rockchip fde80000.hdmi: i2c write nack! When I add ``dw_hdmi_qp.dyndbg`` to the kernel command line, I do see them at debug level. This is when I boot up my NanoPC-T6 LTS connected to my 4K TV while it is turned OFF. When I boot up my NanoPC-T6 LTS connected to my 4K TV while it is turned ON, dmesg is rather clean wrt dw_hdmi_qp both with and without ``dw_hdmi_qp.dyndbg`` in my kernel command line. So it acts exactly as intended :-) Thus feel free to include my: Tested-by: Diederik de Haas <[email protected]> # NanoPC-T6 LTS Thanks! Cheers, Diederik > The DDC users already report failures at the appropriate level, e.g. the > SCDC helpers via drm_scdc_dbg(). This also makes the no-hpd special > casing of the read path messages redundant, so drop it. > > Reported-by: Diederik de Haas <[email protected]> > Signed-off-by: Cristian Ciocaltea <[email protected]> > --- > drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 16 ++++------------ > 1 file changed, 4 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c > b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c > index c9568aea98dc..9abcea92b720 100644 > --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c > +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c > @@ -350,22 +350,14 @@ static int dw_hdmi_qp_i2c_read(struct dw_hdmi_qp *hdmi, > > stat = wait_for_completion_timeout(&i2c->cmp, HZ / 10); > if (!stat) { > - if (hdmi->no_hpd) > - dev_dbg_ratelimited(hdmi->dev, > - "i2c read timed out\n"); > - else > - dev_err(hdmi->dev, "i2c read timed out\n"); > + dev_dbg_ratelimited(hdmi->dev, "i2c read timed out\n"); > dw_hdmi_qp_write(hdmi, 0x01, I2CM_CONTROL0); > return -EAGAIN; > } > > /* Check for error condition on the bus */ > if (i2c->stat & I2CM_NACK_RCVD_IRQ) { > - if (hdmi->no_hpd) > - dev_dbg_ratelimited(hdmi->dev, > - "i2c read error\n"); > - else > - dev_err(hdmi->dev, "i2c read error\n"); > + dev_dbg_ratelimited(hdmi->dev, "i2c read error\n"); > dw_hdmi_qp_write(hdmi, 0x01, I2CM_CONTROL0); > return -EIO; > } > @@ -404,14 +396,14 @@ static int dw_hdmi_qp_i2c_write(struct dw_hdmi_qp *hdmi, > > stat = wait_for_completion_timeout(&i2c->cmp, HZ / 10); > if (!stat) { > - dev_err(hdmi->dev, "i2c write time out!\n"); > + dev_dbg_ratelimited(hdmi->dev, "i2c write time out!\n"); > dw_hdmi_qp_write(hdmi, 0x01, I2CM_CONTROL0); > return -EAGAIN; > } > > /* Check for error condition on the bus */ > if (i2c->stat & I2CM_NACK_RCVD_IRQ) { > - dev_err(hdmi->dev, "i2c write nack!\n"); > + dev_dbg_ratelimited(hdmi->dev, "i2c write nack!\n"); > dw_hdmi_qp_write(hdmi, 0x01, I2CM_CONTROL0); > return -EIO; > }
