> On 7 Oct 2026, at 11:36, Mary Guillemard <[email protected]> wrote:
>
> This workaround is here for the old Gallium driver and predate async CE
> and NVDEC. Instead of only skipping it for NVDEC, let's only apply it
> in case of GR channels.
>
> This should make async CE work properly on Turing by stopping the assign
> of a GRCE. (here CE0)
>
> Signed-off-by: Mary Guillemard <[email protected]>
> ---
> drivers/gpu/drm/nouveau/nouveau_abi16.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c
> b/drivers/gpu/drm/nouveau/nouveau_abi16.c
> index e907c1d07887..e876f154963d 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c
> @@ -488,7 +488,7 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS)
> goto done;
> break;
> case NV_DEVICE_INFO_V0_TURING:
> - if (engine != NV_DEVICE_HOST_RUNLIST_ENGINES_NVDEC) {
> + if (engine == NV_DEVICE_HOST_RUNLIST_ENGINES_GR) {
> ret = nvif_object_ctor(&chan->chan->user, "abi16CeWar",
> 0, TURING_DMA_COPY_A, NULL, 0,
> &chan->ce);
>
> ---
> base-commit: 70456f05d4b6396b22048c4b8cd3cb98ecf9f9e3
> change-id: 20261007-turing-async-ce-fix-42e179e27d4a
>
> Best regards,
> --
> Mary Guillemard <[email protected]>
>
Sorry, it didn’t occur to me to do this instead of the NVDEC only fix.
Reviewed-by: Daniel Almeida <[email protected]>
