On 10/9/26 5:16 AM, Xilin Wu wrote: > The MISC0 update clears the bit-depth field but only ORs in the new > colorimetry value. Bits from the previous stream can therefore survive > when the new value clears them. > > Clear the colorimetry field together with the bit-depth field before > programming the new stream. > > Assisted-by: LLM > Signed-off-by: Xilin Wu <[email protected]> > --- > drivers/gpu/drm/msm/dp/dp_ctrl.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c > b/drivers/gpu/drm/msm/dp/dp_ctrl.c > index 791bb3af2cad..783cafb22374 100644 > --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c > +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c > @@ -476,7 +476,8 @@ static void msm_dp_ctrl_config_misc1_misc0(struct > msm_dp_ctrl_private *ctrl, > misc_val = msm_dp_read_link(ctrl, REG_DP_MISC1_MISC0); > > /* clear bpp bits */ > - misc_val &= ~(0x07 << DP_MISC0_TEST_BITS_DEPTH_SHIFT); > + misc_val &= ~((0x07 << DP_MISC0_TEST_BITS_DEPTH_SHIFT) | > + GENMASK(4, 1));
The colorimetry field spans bits 7:1 AFAICU and bit 15 means Y-only video Furthermore, I believe this register holds the standard fields/ values defined in drm_dp.h near "/* MSA (Main Stream Attribute) MISC bits (as MISC1<<8|MISC0) */" so we can drop the local defines Konrad
