On Wed, 30 Sep 2026 12:56:29 +0000, Christian Hewitt <[email protected]> wrote: > After its first runtime suspend, every power-off of the Mali-T820 in > Amlogic GXM SoCs times out and floods the log with shader, tiler and L2 > power transition timeouts. Following a soft reset the cores report not > ready but PWRTRANS never clears, however long the driver waits.
Would you mind building the driver from the latest drm-misc-next and testing whether this is still the case? Today I merged a patch series with a fix for a long-standing bug that prevented the device from going into suspension because of mismanagement of the PM refcount. It might be that what you report as an issue triggered by power transitions is something altogether different. > > The transitions complete normally when the GPU comes out of a hardware > reset, as it does at probe. Use runtime PM with reset and clock control panfrost_device_reset() is always called as part of the PM runtime resume operation, so I'm assuming what you mean here is that reset control is deasserted at runtime resume when the SoC supports it -- Adrián Larumbe <[email protected]>
