On Evergreen/Redwood (and likely other UVD v1/v2 hardware), resume from
suspend intermittently fails the UVD ring test:
radeon 0000:01:00.0: [drm] *ERROR* radeon: ring 5 test failed (0xCAFEDEAD)
radeon 0000:01:00.0: failed initializing UVD (-22).
Cold boot always succeeds; resume succeeds only in about half of the cycles
(42 measured suspend/resume cycles on a Radeon HD 5650M: OK counts per
6-cycle run were 2, 3, 5, 6, 1, 5, 3). Once the ring test fails, UVD stays
dead for the rest of the session and hardware video decode silently falls
back to CPU.
The resume path runs the same full asic startup as cold boot
(evergreen_resume() -> evergreen_startup()), so the difference is the
hardware state at entry, not a skipped call. The single 100 ms ring-test
window right after VCPU boot simply races the hardware coming out of
D3 + ASIC reset.
Retry the init sequence instead of giving up: on failure of clock setup,
VCPU start or the ring test, fully stop UVD, let it settle for 20 ms and
try again (up to 3 attempts). Each retry logs the failing step and the
attempt number, which also makes future reports of this failure mode
self-diagnosing.
On the same machine the patched driver went 6/6 OK, with the log showing
the ring test failing on attempts 1-2 and succeeding on attempt 3 — i.e.
the retry caught exactly the failure the stock driver used to declare
fatal.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1867
Link: https://bugs.launchpad.net/bugs/1865130
Tested-by: ukrainer8 <[email protected]> # Radeon HD 5650M,
kernel 7.0.0
Signed-off-by: ukrainer8 <[email protected]>
---
Resent with git-send-email; the previous copy was mangled by my mailer
(pointed out by Alex Deucher). Same patch, no code changes.
drivers/gpu/drm/radeon/uvd_v1_0.c | <diffstat>
--- a/drivers/gpu/drm/radeon/uvd_v1_0.c
+++ b/drivers/gpu/drm/radeon/uvd_v1_0.c
@@ -158,24 +158,45 @@
{
struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX];
uint32_t tmp;
- int r;
+ int r, retry;
- /* raise clocks while booting up the VCPU */
- if (rdev->family < CHIP_RV740)
- radeon_set_uvd_clocks(rdev, 10000, 10000);
- else
- radeon_set_uvd_clocks(rdev, 53300, 40000);
+ /* after resume the first ring test can race with the hardware; retry */
+ for (retry = 0; retry < 3; retry++) {
+ /* raise clocks while booting up the VCPU */
+ if (rdev->family < CHIP_RV740)
+ r = radeon_set_uvd_clocks(rdev, 10000, 10000);
+ else
+ r = radeon_set_uvd_clocks(rdev, 53300, 40000);
+ if (r)
+ drm_warn(&rdev->ddev, "radeon: raising UVD clocks
failed (%d), attempt %d\n",
+ r, retry + 1);
- r = uvd_v1_0_start(rdev);
- if (r)
- goto done;
+ if (!r) {
+ r = uvd_v1_0_start(rdev);
+ if (r)
+ drm_warn(&rdev->ddev, "radeon: starting UVD
failed (%d), attempt %d\n",
+ r, retry + 1);
+ }
- ring->ready = true;
- r = radeon_ring_test(rdev, R600_RING_TYPE_UVD_INDEX, ring);
- if (r) {
- ring->ready = false;
- goto done;
+ if (!r) {
+ ring->ready = true;
+ r = radeon_ring_test(rdev, R600_RING_TYPE_UVD_INDEX,
ring);
+ if (r) {
+ ring->ready = false;
+ drm_warn(&rdev->ddev, "radeon: UVD ring test
failed (%d), attempt %d\n",
+ r, retry + 1);
+ }
+ }
+
+ if (!r)
+ break;
+
+ uvd_v1_0_stop(rdev);
+ if (retry < 2)
+ mdelay(20);
}
+ if (r)
+ goto done;
r = radeon_ring_lock(rdev, ring, 10);
if (r) {
