On 10/15/26 11:54 AM, Balaji Kalkonda wrote:
> Add the DisplayPort controller node, including its OPP table,
> controller clocks and power domain.

[...]

> +                     mdss_dp0: displayport-controller@9ad2000 {
> +                             compatible = "qcom,kaanapali-dp";
> +                             reg = <0x0 0x09ad2000 0x0 0x10c>,

sz=0x200

> +                                   <0x0 0x09ad2200 0x0 0xc8>,

sz=0x200

> +                                   <0x0 0x09ad3000 0x0 0x78>,

sz=0xc00

> +                                   <0x0 0x09ad4000 0x0 0xa0>,

sz=0x400

> +                                   <0x0 0x09ad5000 0x0 0xa0>;

sz=0x400> +
> +                             interrupts-extended = <&mdss 12>;
> +
> +                             clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> +                                      <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
> +                                      <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
> +                                      <&dispcc 
> DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
> +                                      <&dispcc 
> DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
> +                                      <&dispcc 
> DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
> +
> +                             clock-names = "core_iface",

Stray \n above

Konrad

Reply via email to