After resume from S3, DC enables SubVP on a single FreeSync display at
a high refresh rate, although dcn32_allow_subvp_high_refresh_rate() is
meant to keep SubVP off that configuration ("For single display cases,
freesync must be disabled"). On an RX 7900 XTX driving a FreeSync TV
at 3840x2160@120, amdgpu_dm_capabilities reports sub-viewport disabled
after boot and enabled after "rtcwake -m mem", and the memory clock
starts switching. It stays that way until a later commit re-validates
the state; a CRTC gamma change (toggling Night Light) turns SubVP off
again.
The policy reads dc_stream_state::allow_freesync while the new state
is validated, but amdgpu_dm sets that field only in
amdgpu_dm_update_freesync_state_on_stream(), on the first flip after
the commit. A stream created by a modeset is therefore validated as
if FreeSync were off. On resume, dm_destroy_cached_state() drops the
streams and forces a modeset, so the resumed state is validated
without FreeSync.
Set allow_freesync in amdgpu_dm_get_freesync_config_for_crtc(), which
atomic check calls for every active CRTC and which already writes
ignore_msa_timing_param to the stream. It uses vrr_supported, the
condition the flip-time value is derived from. With this change the
same TV keeps SubVP disabled across "rtcwake -m mem".
On this machine SubVP is also what exposes the single-frame scanout
corruption reported in the thread linked below, so the FreeSync
setting stopped working as a workaround after every suspend.
Fixes: 87f0c16e0eeb ("drm/amd/display: Enable SubVP for high refresh rate
displays")
Link:
https://lore.kernel.org/all/[email protected]/
Signed-off-by: Mikhail Gavrilov <[email protected]>
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c
index 7e484adb4120..f26dd206dffa 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c
@@ -128,6 +128,14 @@ void amdgpu_dm_get_freesync_config_for_crtc(
vrefresh >= aconnector->min_vfreq &&
vrefresh <= aconnector->max_vfreq;
+ /*
+ * DC reads allow_freesync while validating the new state, for example
+ * to keep SubVP off a single FreeSync display, but it is otherwise set
+ * only on the first flip after the commit. Set it here, so that a
+ * stream created by this commit is not validated without it.
+ */
+ new_crtc_state->stream->allow_freesync = new_crtc_state->vrr_supported;
+
if (new_crtc_state->vrr_supported) {
new_crtc_state->stream->ignore_msa_timing_param = true;
fs_vid_mode = new_crtc_state->freesync_config.state ==
VRR_STATE_ACTIVE_FIXED;
--
2.56.0
