On 10/18/26 8:29 PM, Mohammed AlHashim via B4 Relay wrote: > From: Mohammed AlHashim <[email protected]> > > a6xx_gpu_init() registers devfreq through adreno_gpu_init() -> > msm_gpu_init() -> msm_devfreq_init(), and only afterwards calls > a6xx_gmu_init(), which fills gmu->gpu_freqs[] and sets > gmu->nr_gpu_freqs. The devfreq sysfs node is visible in that window, > so a write to min_freq or max_freq can reach a6xx_gmu_set_freq() while > nr_gpu_freqs is still 0.
[...] > If you'd rather fix the ordering, so devfreq is registered after > a6xx_gmu_init(), I'm happy to rework it that way. I think that's the cleaner fix. Konrad
