The RK3568 eDP controller does not require any GRF configurations, so make the "rockchip,grf" property optional. Also enable the optional avdd-0v9 and avdd-1v8 supplies which power the eDP PHY.
Add the "rockchip,rk3568-edp" compatible along with its chip data; the register base in the chip data is used to match the platform device memory resource. Signed-off-by: Damon Ding <[email protected]> --- Changes in v2: - Fail the probe when the chip data requires GRF configurations while the "rockchip,grf" property is missing.(Sashiko) --- .../gpu/drm/rockchip/analogix_dp-rockchip.c | 24 ++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index ccdd4b9ecdb8..38c78360842f 100644 --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c @@ -320,12 +320,17 @@ static int rockchip_dp_of_probe(struct rockchip_dp_device *dp) struct device *dev = dp->dev; struct device_node *np = dev->of_node; struct clk *clk; + int ret; - dp->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); + dp->grf = syscon_regmap_lookup_by_phandle_optional(np, "rockchip,grf"); if (IS_ERR(dp->grf)) return dev_err_probe(dev, PTR_ERR(dp->grf), "failed to get rockchip,grf property\n"); + if (!dp->grf && (dp->data->lcdc_sel.valid || dp->data->edp_mode.valid)) + return dev_err_probe(dev, -EINVAL, + "missing the required rockchip,grf property\n"); + dp->grfclk = devm_clk_get_optional(dev, "grf"); if (IS_ERR(dp->grfclk)) return dev_err_probe(dev, PTR_ERR(dp->grfclk), @@ -351,6 +356,14 @@ static int rockchip_dp_of_probe(struct rockchip_dp_device *dp) return dev_err_probe(dev, PTR_ERR(dp->apbrst), "failed to get apb reset control\n"); + ret = devm_regulator_get_enable_optional(dev, "avdd-0v9"); + if (ret && ret != -ENODEV) + return dev_err_probe(dev, ret, "failed to enable avdd-0v9\n"); + + ret = devm_regulator_get_enable_optional(dev, "avdd-1v8"); + if (ret && ret != -ENODEV) + return dev_err_probe(dev, ret, "failed to enable avdd-1v8\n"); + return 0; } @@ -530,6 +543,14 @@ static const struct rockchip_dp_chip_data rk3288_dp[] = { { /* sentinel */ } }; +static const struct rockchip_dp_chip_data rk3568_edp[] = { + { + .chip_type = RK3568_EDP, + .reg = 0xfe0c0000, + }, + { /* sentinel */ } +}; + static const struct rockchip_dp_chip_data rk3576_edp[] = { { .chip_type = RK3576_EDP, @@ -555,6 +576,7 @@ static const struct rockchip_dp_chip_data rk3588_edp[] = { static const struct of_device_id rockchip_dp_dt_ids[] = { {.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp }, {.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp }, + {.compatible = "rockchip,rk3568-edp", .data = &rk3568_edp }, {.compatible = "rockchip,rk3576-edp", .data = &rk3576_edp }, {.compatible = "rockchip,rk3588-edp", .data = &rk3588_edp }, {} -- 2.34.1
