On Wed, Oct 21, 2026 at 1:40 AM Konrad Dybcio
<[email protected]> wrote:
>
> On 10/20/26 10:46 PM, Rob Clark wrote:
> > Don't let the length bleed into b31.
> >
> > Signed-off-by: Rob Clark <[email protected]>
> > ---
> > drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
> > b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
> > index d60cbfaa0d8e..5e1f35c83d63 100644
> > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
> > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
> > @@ -244,7 +244,7 @@ struct a7xx_cp_smmu_info {
> > */
> > #define A6XX_PROTECT_NORDWR(_reg, _len) \
> > ((1 << 31) | \
> > - (((_len) & 0x3FFF) << 18) | ((_reg) & 0x3FFFF))
> > + (((_len) & 0x1FFF) << 18) | ((_reg) & 0x3FFFF))
>
> Time for FIELD_PREP()?
We have generated builders, ie. A6XX_CP_PROTECT_REG_BASE_ADDR()/etc..
which would be better but they don't play nicely with tables..
BR,
-R
> Konrad
>
> >
> > /*
> > * Same as above, but allow reads over the range. For areas of mixed use
> > (such
> > @@ -252,7 +252,7 @@ struct a7xx_cp_smmu_info {
> > * single register
> > */
> > #define A6XX_PROTECT_RDONLY(_reg, _len) \
> > - ((((_len) & 0x3FFF) << 18) | ((_reg) & 0x3FFFF))
> > + ((((_len) & 0x1FFF) << 18) | ((_reg) & 0x3FFFF))
> >
> > extern const struct adreno_gpu_funcs a6xx_gpu_funcs;
> > extern const struct adreno_gpu_funcs a6xx_gmuwrapper_funcs;
