Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] drm/imagination: wrong page count check and loop bound in pvr_vm_get_pt_phys_addrs() --
commit e4145d0a7941bfef48f4dfeebed31eabbdbd97ec Author: Alessio Belle <[email protected]> drm/imagination: Limit access to the MIPS firmware interface This commit splits struct pvr_fw_mips_data into separate firmware and VM structures internal to pvr_fw_mips.c and pvr_vm_mips.c, removes pvr_fw_mips.h, and adds pvr_vm_get_pt_phys_addrs() to retrieve the MIPS firmware page table physical addresses. > diff --git a/drivers/gpu/drm/imagination/pvr_vm_mips.c > b/drivers/gpu/drm/imagination/pvr_vm_mips.c > index 5847a1c92bea8..264ea0fccf9c1 100644 > --- a/drivers/gpu/drm/imagination/pvr_vm_mips.c > +++ b/drivers/gpu/drm/imagination/pvr_vm_mips.c [ ... ] > @@ -230,8 +256,38 @@ pvr_vm_mips_unmap(struct pvr_device *pvr_dev, struct > pvr_fw_object *fw_obj) > ROGUE_MIPSFW_LOG2_PAGE_SIZE_4K; > > for (u32 pfn = start_pfn; pfn < end_pfn; pfn++) > - WRITE_ONCE(mips_data->pt[pfn], 0); > + WRITE_ONCE(vm_data->pt[pfn], 0); > > pvr_mmu_flush_request_all(pvr_dev); > WARN_ON(pvr_mmu_flush_exec(pvr_dev, true)); > } > + > +/** > + * pvr_vm_get_pt_phys_addrs() - Acquire the physical addresses of the MIPS > FW page table pages > + * @pvr_dev: Target PowerVR device. > + * @phys_addrs: Output array for physical addresses of MIPS FW page table > pages. > + * @max_num_addrs: Maximum number of addresses that can be written to > @phys_addrs. > + * > + * Returns: > + * * 0 on success, or > + * * -%EINVAL if @phys_addrs cannot accommodate all MIPS FW page table > pages. > + */ > +int > +pvr_vm_get_pt_phys_addrs(struct pvr_device *pvr_dev, u64 *phys_addrs, int > max_num_addrs) > +{ > + struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; > + struct pvr_vm_mips_data *vm_data = > fw_dev->processor_data.mips_data.vm_data; > + > + if (ARRAY_SIZE(vm_data->pt_pages) > max_num_addrs) > + return -EINVAL; > + > + for (u32 page_nr = 0; page_nr < max_num_addrs; page_nr++) { > + /* Firmware expects 4k pages, but host page size might be > different. */ > + u32 src_page_nr = (page_nr * ROGUE_MIPSFW_PAGE_SIZE_4K) >> > PAGE_SHIFT; > + u32 page_offset = (page_nr * ROGUE_MIPSFW_PAGE_SIZE_4K) & > ~PAGE_MASK; > + > + phys_addrs[page_nr] = vm_data->pt_dma_addr[src_page_nr] + > page_offset; > + } > + > + return 0; > +} [Severity: Medium] In pvr_vm_get_pt_phys_addrs(), each element written to phys_addrs[] is a 4K MIPS firmware page table address, whereas vm_data->pt_pages and vm_data->pt_dma_addr are sized by PVR_MIPS_PT_PAGE_COUNT in units of host PAGE_SIZE pages: #define PVR_MIPS_PT_PAGE_COUNT \ DIV_ROUND_UP(ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES * \ ROGUE_MIPSFW_PAGE_SIZE_4K, PAGE_SIZE) On a host with 16K or 64K pages, ARRAY_SIZE(vm_data->pt_pages) is 1 while ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES is 4, so checking ARRAY_SIZE(vm_data->pt_pages) > max_num_addrs allows a max_num_addrs between 1 and 3 to pass instead of returning -EINVAL. In addition, the loop iterates up to max_num_addrs rather than ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES. If a caller passes max_num_addrs larger than ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES, src_page_nr will exceed PVR_MIPS_PT_PAGE_COUNT - 1 and read past the end of vm_data->pt_dma_addr[]. Also, because max_num_addrs is a signed int compared against unsigned types (size_t in ARRAY_SIZE and u32 page_nr), a negative max_num_addrs converts to a large unsigned value, bypassing the bounds check and overflowing vm_data->pt_dma_addr[] and phys_addrs[]. Should max_num_addrs be u32 (or size_t), checked against ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES, with the loop bounded by ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES? -- Sashiko AI review ยท https://sashiko.dev/#/patchset/[email protected]?part=1
