On Thu, Oct 22, 2026 at 1:04 AM Konrad Dybcio <[email protected]> wrote: > > On 10/21/26 10:41 PM, Rob Clark wrote: > > The generated headers contain the current (at time of generation) hw > > recommended values. Using these directly makes it easier to stay up > > to date. > > > > Signed-off-by: Rob Clark <[email protected]> > > --- > > For context, here's an LLM-generated change summary: > > What changed > - RB_GC_GMEM_PROTECT is gone from every generated table. That matches the > code change, which now computes the value. > - Every generated table adds GMU (GMUCX_*) entries, and most also add > RBBM_INTERFACE_HANG_INT_CNTL. > - Several hand-written entries are missing from the generated tables, for > example RB_CCU_DBG_ECO_CNTL and UCHE_MODE_CNTL on a810, and RB_RBP_CNTL and > SP_HLSQ_DBG_ECO_CNTL_1/2/3 on a840. > - Some entries keep the same register but change value or pipe scope: > - TPL1_DBG_ECO_CNTL changes from 0x10100000 to 0x10000000 on a810, a840, a845 > and a850. > - TPL1_DBG_ECO_CNTL1 on a830 changes from 0x04000724 to 0x720 and from > PIPE_NONE to PIPE_BR.
I've fixed the PIPE_BR thing. But there are still a few other issues. I'll drop the generated nonctx list in the next version of this series. BR, -R > - PC_CHICKEN_BITS_3 on x285, a810 and a840 changes from 0x500000 to 0x400000. > - GRAS_DBG_ECO_CNTL on a845 and a850 changes from 0x01000800 to 0x00000800. > - UCHE_HW_DBG_CNTL on a850 changes from 0x01410000 to 0x01010000. > > Konrad
