The HDMI 2.2 spec defines three new FRL rates - 16, 20 and 24 Gbps per lane over 4 lanes (Max_FRL_Rate values 7, 8 and 9 in the HF-SCDB). The current code stops at the HDMI 2.1 ceiling of 12 Gbps per lane, so a sink that advertises an HDMI 2.2 rate is treated as having no FRL support at all and the link ends up trained far below what the sink actually supports.
Patch 1 teaches the DRM EDID parser to decode the three new rates. Patch 2 maps them back to the FRL rate index used by DC in amdgpu_dm and extends the KUnit coverage. Fangzhi Zuo (2): drm/edid: Parse HDMI 2.2 FRL rates from the SCDS drm/amd/display: Accept HDMI 2.2 FRL rates from the sink EDID .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 6 ++++ .../amdgpu_dm/tests/amdgpu_dm_helpers_test.c | 30 +++++++++++++++++++ drivers/gpu/drm/drm_edid.c | 12 ++++++++ 3 files changed, 48 insertions(+) -- 2.53.0
