Port the gtt selftets to test multiple GTs instead of just GT0. Mock device tests stay on the to_gt() macro, as the mock device is hard-coded to have a single gt at the point of writing the patch.
Signed-off-by: Krzysztof Niemiec <[email protected]> --- Another assumption I made: we don't know anything a priori about any shared GGTTs. This in truth is not really the case cause the multi-GT platforms we do have in i915 do share a GGTT across GTs (namely GT_MEDIA gets assigned GT0's GGTT). So the assumption can be strengthened at the loss of genericity. drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 32 +++++++++++++------ 1 file changed, 22 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c index e6bd06774816..a2b8c1753daf 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c @@ -152,7 +152,8 @@ fake_dma_object(struct drm_i915_private *i915, u64 size) static int igt_ppgtt_alloc(void *arg) { - struct drm_i915_private *dev_priv = arg; + struct intel_gt *gt = arg; + struct drm_i915_private *dev_priv = gt->i915; struct i915_ppgtt *ppgtt; struct i915_gem_ww_ctx ww; u64 size, last, limit; @@ -163,7 +164,7 @@ static int igt_ppgtt_alloc(void *arg) if (!HAS_PPGTT(dev_priv)) return 0; - ppgtt = i915_ppgtt_create(to_gt(dev_priv), 0); + ppgtt = i915_ppgtt_create(gt, 0); if (IS_ERR(ppgtt)) return PTR_ERR(ppgtt); @@ -1194,11 +1195,12 @@ static int misaligned_pin(struct i915_address_space *vm, return 0; } -static int exercise_ppgtt(struct drm_i915_private *dev_priv, +static int exercise_ppgtt(struct intel_gt *gt, int (*func)(struct i915_address_space *vm, u64 hole_start, u64 hole_end, unsigned long end_time)) { + struct drm_i915_private *dev_priv = gt->i915; struct i915_ppgtt *ppgtt; IGT_TIMEOUT(end_time); struct file *file; @@ -1211,7 +1213,7 @@ static int exercise_ppgtt(struct drm_i915_private *dev_priv, if (IS_ERR(file)) return PTR_ERR(file); - ppgtt = i915_ppgtt_create(to_gt(dev_priv), 0); + ppgtt = i915_ppgtt_create(gt, 0); if (IS_ERR(ppgtt)) { err = PTR_ERR(ppgtt); goto out_free; @@ -1280,12 +1282,12 @@ static int sort_holes(void *priv, const struct list_head *A, return 1; } -static int exercise_ggtt(struct drm_i915_private *i915, +static int exercise_ggtt(struct intel_gt *gt, int (*func)(struct i915_address_space *vm, u64 hole_start, u64 hole_end, unsigned long end_time)) { - struct i915_ggtt *ggtt = to_gt(i915)->ggtt; + struct i915_ggtt *ggtt = gt->ggtt; u64 hole_start, hole_end, last = 0; struct drm_mm_node *node; IGT_TIMEOUT(end_time); @@ -1349,8 +1351,9 @@ static int igt_ggtt_page(void *arg) { const unsigned int count = PAGE_SIZE/sizeof(u32); I915_RND_STATE(prng); - struct drm_i915_private *i915 = arg; - struct i915_ggtt *ggtt = to_gt(i915)->ggtt; + struct intel_gt *gt = arg; + struct drm_i915_private *i915 = gt->i915; + struct i915_ggtt *ggtt = gt->ggtt; struct drm_i915_gem_object *obj; intel_wakeref_t wakeref; struct drm_mm_node tmp; @@ -1976,8 +1979,17 @@ int i915_gem_gtt_live_selftests(struct drm_i915_private *i915) SUBTEST(igt_ggtt_page), SUBTEST(igt_ggtt_misaligned_pin), }; + struct intel_gt *gt; + uint32_t id; + int err; - GEM_BUG_ON(offset_in_page(to_gt(i915)->ggtt->vm.total)); + for_each_gt(gt, i915, id) { + GEM_BUG_ON(offset_in_page(gt->ggtt->vm.total)); - return i915_live_subtests(tests, i915); + err = intel_gt_live_subtests(tests, gt); + if (err) + return err; + } + + return 0; } -- 2.55.0
