On 10/29/26 1:32 PM, Qianhui Xu wrote: > Some platforms provide more than one reset for the MDSS hardware block: > beside the MDSS core reset, the SM8750 display clock controller also > exposes block resets for the MDSS core INT2 interrupt controller and > for the MDSS RSC (resource state controller). > > Allow the resets property to list up to three resets, keeping the MDSS > core reset as the first entry so that existing device trees describing > a single reset remain valid. > > Signed-off-by: Qianhui Xu <[email protected]> > --- > .../devicetree/bindings/display/msm/mdss-common.yaml | 5 ++++- > .../devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml | 4 +++- > 2 files changed, 7 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml > b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml > index c6305a6e03..7c0ac90511 100644 > --- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml > +++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml > @@ -84,8 +84,11 @@ properties: > - const: cpu-cfg > > resets: > + minItems: 1 > items: > - - description: MDSS_CORE reset > + - description: MDSS core reset > + - description: MDSS core INT2 interrupt controller reset > + - description: MDSS RSC (resource state controller) reset
MDSS RSC is not part of MDSS itself Konrad
