Hi Krzysztof,
On 11/3/2026 7:20 PM, Krzysztof Kozlowski wrote:
On Fri, Oct 30, 2026 at 02:49:01PM +0800, Damon Ding wrote:
Document the eDP transmitter PHY with NaNeng IP block found on the
RK3568 SoC. The PHY has its own register window inside the eDP PHY
GRF, so its node is modeled as a child of the eDP PHY GRF syscon with
a reg property describing that window. Also add the
"rockchip,rk3568-edp-phy-grf" compatible and the phy node reference to
the Rockchip GRF schema.
Signed-off-by: Damon Ding <[email protected]>
---
Changes in v4:
- Add the reg entry for the PHY node and the ranges/#address-cells/
#size-cells for the parent syscon node.
---
.../bindings/phy/rockchip,rk3568-edp-phy.yaml | 68 +++++++++++++++++++
.../devicetree/bindings/soc/rockchip/grf.yaml | 20 ++++++
2 files changed, 88 insertions(+)
create mode 100644
Documentation/devicetree/bindings/phy/rockchip,rk3568-edp-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3568-edp-phy.yaml
b/Documentation/devicetree/bindings/phy/rockchip,rk3568-edp-phy.yaml
new file mode 100644
index 000000000000..b78da00ffefd
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/rockchip,rk3568-edp-phy.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/rockchip,rk3568-edp-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip eDP Transmitter PHY with NaNeng IP block
+
+maintainers:
+ - Damon Ding <[email protected]>
+ - Heiko Stuebner <[email protected]>
+
+description:
+ On the RK3568 SoC the eDP PHY is controlled through the eDP PHY GRF
+ registers, therefore the PHY node is expected to be a child of the
+ eDP PHY GRF syscon node.
+
+properties:
+ compatible:
+ const: rockchip,rk3568-edp-phy
+
+ reg:
+ maxItems: 1
+ description: PHY registers within the eDP PHY GRF.
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ const: refclk
Just "ref"
Will fix in v5.
+
+ "#phy-cells":
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/rk3568-cru.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ edp_phy_grf: syscon@fdcb0000 {
+ compatible = "rockchip,rk3568-edp-phy-grf", "syscon", "simple-mfd";
This is beyond the scope of this binding. Drop entire node.
Will Drop in v5. The example should only show the PHY node itself.
+ reg = <0x0 0xfdcb0000 0x0 0x8000>;
+ clocks = <&cru PCLK_EDPPHY_GRF>;
+ ranges = <0x0 0x0 0xfdcb0000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ edp_phy: phy@0 {
+ compatible = "rockchip,rk3568-edp-phy";
+ reg = <0x0 0x100>;
+ clocks = <&pmucru XIN_OSC0_EDPPHY_G>;
+ clock-names = "refclk";
+ #phy-cells = <0>;
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
index 7bcb4e2f47ec..c089bd014003 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
@@ -93,6 +93,7 @@ properties:
- rockchip,rk3399-grf
- rockchip,rk3399-pmugrf
- rockchip,rk3562-pmu-grf
+ - rockchip,rk3568-edp-phy-grf
- rockchip,rk3568-grf
- rockchip,rk3568-pmugrf
- rockchip,rk3576-ioc-grf
@@ -119,6 +120,8 @@ properties:
"#size-cells":
const: 1
+ ranges: true
+
required:
- compatible
- reg
@@ -156,6 +159,22 @@ allOf:
$ref: /schemas/phy/rockchip,rk3288-dp-phy.yaml#
unevaluatedProperties: false
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: rockchip,rk3568-edp-phy-grf
+
+ then:
+ required:
+ - "#address-cells"
+ - "#size-cells"
+ patternProperties:
+ "^phy@[0-9a-f]+$":
+ type: object
+ $ref: /schemas/phy/rockchip,rk3568-edp-phy.yaml#
+ unevaluatedProperties: false
Properties should be defined in top level. Here you only narrow them.
This binding is getting close to unreadable/unmaintainable. Split new
devices with children to their own binding.
Agreed. The "rockchip,rk3568-edp-phy-grf" syscon will be documented by
its own binding schema in v5.
Best regards,
Damon
