This series extends the output color format support of the Rockchip DW HDMI QP controller to cover 10-bit YUV 4:2:2 and 8/10-bit YUV 4:2:0.
Patches 1, 7 & 15 improve VOP2 robustness on RK3588, helping recover from exceptions and preventing random display output glitches observed when switching modes that also change the color format, e.g. from RGB to YUV 4:2:0 and vice versa. Patch 8 avoids an incorrect DCLK source switch for 10-bit YUV 4:2:2 by forcing 8 bpc in the bandwidth check. Patches 2-6 address a few vop2 related issues reported by Sashiko, while 9-12 are additional cleanups/improvements. Patch 13 adds MEDIA_BUS_FMT_UYVY10_1X20 for 10-bit YUV 4:2:2 output, configuring the PHY with 8 bpc. YUV 4:2:2 always transmits two 12-bit components per pixel regardless of color depth, so from a clock-rate perspective it is equivalent to three 8-bit RGB components. Patch 14 advertises YUV 4:2:0 output, now that the bus-format and VOP2 support are in place. Tested on Radxa's boards ROCK 5B (RK3588) and ROCK 4D (RK3576). Signed-off-by: Cristian Ciocaltea <[email protected]> --- Changes in v6: - Dropped vop2 patch "Send pending event when atomic_enable()" since atomic_enable() is not supposed to fail, and sending the event right away turns the vblank/flip_done timeout WARNs into a silent false success (Daniel) - Added new vop2 patch "Disable core clocks before dropping runtime PM reference" (Sashiko) - Captured dclk_src at init in "drm/rockchip: vop2: Consolidate HDMI PHY PLL clock parent switch" (Daniel) - Reworked "drm/rockchip: vop2: Avoid DCLK source switch for 10-bit YUV422 output" into "drm/rockchip: vop2: Use TMDS character rate to select DCLK source" and further improved DCLK source switch handling - Replaced the ternary with a helper in "drm/rockchip: dw_hdmi_qp: Support 10-bit YUV422 output format" - Rebased series onto v7.4-rc1 - Link to v5: https://patch.msgid.link/[email protected] Changes in v5: - Rebased onto latest drm-misc-next and fixed the conflicts introduced by the recent addition of HDMI 2.0 support to the DRM infrastructure - Updated patch "drm/rockchip: vop2: Reset AXI and DCLK to improve robustness" to also assert the AXI reset in the bind path, fixing DSI panel support on RK3588 EVB1 (Sebastian Reichel) - Added new patch "drm/rockchip: dw_hdmi_qp: Do not mask error code in atomic_check()" to fix a pre-existing issue reported by Sashiko - Link to v4: https://patch.msgid.link/[email protected] Changes in v4: - Collected T-b tags from Igor - Rebased onto the latest drm-misc-next, which now contains the HDPTX PHY driver fixes, so the runtime dependency has been dropped - Link to v3: https://patch.msgid.link/[email protected] Changes in v3: - Updated patch 3 to skip any hardware programming in the callbacks gated by drm_atomic_helper_commit_planes() after powering down VOP2 on an atomic_enable() error (Sashiko) - Ensured VBLANK events are sent immediately when atomic_enable() fails, hence preventing userspace processes waiting for the page flip completion to hang indefinitely (new patch 4, Sashiko) - Rebased onto latest drm-misc-next - Link to v2: https://patch.msgid.link/[email protected] Changes in v2: - Collected R-b from Krzysztof on the binding patch, while also fixed the property ordering in the example - Renamed vop2_clk_reset() to vop2_reset_assert_deassert() and used to devm_reset_control_get_optional_exclusive() in patch 6 (Philipp Zabel) - Addressed several issues reported by Sashiko * Reset AXI before detaching the IOMMU domain, to close a theoretical window where stale or in-flight DMA transactions could fault or access memory untranslated after the domain is detached (patch 6) * Fixed resource leak on vop2_enable() error path (new patch 2) * Balance state on atomic_enable error paths (new patch 3) * Avoided division by zero when computing max_dclk (new path 4) * Fixed VOP2_MAX_DCLK_RATE overflow on 32-bit (new patch 5) - Rebased onto latest drm-misc-next - Link to v1: https://patch.msgid.link/[email protected] --- Cristian Ciocaltea (15): dt-bindings: display: vop2: Add missing reset properties drm/rockchip: vop2: Fix resource leak on vop2_enable() error path drm/rockchip: vop2: Disable core clocks before dropping runtime PM reference drm/rockchip: vop2: Balance state on atomic_enable() error paths drm/rockchip: vop2: Avoid division by zero when computing max_dclk drm/rockchip: vop2: Fix VOP2_MAX_DCLK_RATE overflow on 32-bit drm/rockchip: vop2: Reset AXI and DCLK to improve robustness drm/rockchip: vop2: Consolidate HDMI PHY PLL clock parent switch drm/rockchip: vop2: Use TMDS character rate to select DCLK source drm/rockchip: vop2: Switch to enum vop_csc_format drm/bridge: dw-hdmi-qp: Log resolution and refresh rate in atomic_enable() drm/rockchip: dw_hdmi_qp: Do not mask error code in atomic_check() drm/rockchip: dw_hdmi_qp: Support 10-bit YUV422 output format drm/rockchip: dw_hdmi_qp: Enable YUV420 output format arm64: dts: rockchip: Add RK3588 VOP2 resets .../bindings/display/rockchip/rockchip-vop2.yaml | 46 +++- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 12 ++ drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 10 +- drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 27 ++- drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 231 +++++++++++++++------ drivers/gpu/drm/rockchip/rockchip_drm_vop2.h | 10 + 6 files changed, 263 insertions(+), 73 deletions(-) --- base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4 change-id: 20260617-dw-hdmi-qp-yuv-2b0f7bb5ba81
