80 col, spaces around operators and other basic cleanup.
Some info message cleanup.
Signed-off-by: Daniel Kurtz <djkurtz at chromium.org>
---
drivers/gpu/drm/i915/intel_i2c.c | 32 +++++++++++++++++++++-----------
1 files changed, 21 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 0713cc2..86b1861 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -230,13 +230,16 @@ gmbus_xfer(struct i2c_adapter *adapter,
(len << GMBUS_BYTE_COUNT_SHIFT) |
(msgs[i].addr << GMBUS_SLAVE_ADDR_SHIFT) |
GMBUS_SLAVE_READ | GMBUS_SW_RDY);
- POSTING_READ(GMBUS2+reg_offset);
+ POSTING_READ(GMBUS2 + reg_offset);
do {
u32 val, loop = 0;
- if (wait_for(I915_READ(GMBUS2 + reg_offset) &
(GMBUS_SATOER | GMBUS_HW_RDY), 50))
+ if (wait_for(I915_READ(GMBUS2 + reg_offset) &
+ (GMBUS_SATOER | GMBUS_HW_RDY),
+ 50))
goto timeout;
- if (I915_READ(GMBUS2 + reg_offset) &
GMBUS_SATOER)
+ if (I915_READ(GMBUS2 + reg_offset) &
+ GMBUS_SATOER)
goto clear_err;
val = I915_READ(GMBUS3 + reg_offset);
@@ -260,12 +263,15 @@ gmbus_xfer(struct i2c_adapter *adapter,
(msgs[i].len << GMBUS_BYTE_COUNT_SHIFT) |
(msgs[i].addr << GMBUS_SLAVE_ADDR_SHIFT) |
GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);
- POSTING_READ(GMBUS2+reg_offset);
+ POSTING_READ(GMBUS2 + reg_offset);
while (len) {
- if (wait_for(I915_READ(GMBUS2 + reg_offset) &
(GMBUS_SATOER | GMBUS_HW_RDY), 50))
+ if (wait_for(I915_READ(GMBUS2 + reg_offset) &
+ (GMBUS_SATOER | GMBUS_HW_RDY),
+ 50))
goto timeout;
- if (I915_READ(GMBUS2 + reg_offset) &
GMBUS_SATOER)
+ if (I915_READ(GMBUS2 + reg_offset) &
+ GMBUS_SATOER)
goto clear_err;
val = loop = 0;
@@ -274,11 +280,14 @@ gmbus_xfer(struct i2c_adapter *adapter,
} while (--len && ++loop < 4);
I915_WRITE(GMBUS3 + reg_offset, val);
- POSTING_READ(GMBUS2+reg_offset);
+ POSTING_READ(GMBUS2 + reg_offset);
}
}
- if (i + 1 < num && wait_for(I915_READ(GMBUS2 + reg_offset) &
(GMBUS_SATOER | GMBUS_HW_WAIT_PHASE), 50))
+ if (i + 1 < num &&
+ wait_for(I915_READ(GMBUS2 + reg_offset) &
+ (GMBUS_SATOER | GMBUS_HW_WAIT_PHASE),
+ 50))
goto timeout;
if (I915_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
goto clear_err;
@@ -300,14 +309,15 @@ done:
* till then let it sleep.
*/
if (wait_for((I915_READ(GMBUS2 + reg_offset) & GMBUS_ACTIVE) == 0, 10))
- DRM_INFO("GMBUS timed out waiting for idle\n");
+ DRM_INFO("GMBUS [%s] timed out waiting for idle\n",
+ bus->adapter.name);
I915_WRITE(GMBUS0 + reg_offset, 0);
ret = i;
goto out;
timeout:
- DRM_INFO("GMBUS timed out, falling back to bit banging on pin %d
[%s]\n",
- bus->reg0 & 0xff, bus->adapter.name);
+ DRM_INFO("GMBUS [%s] timed out, falling back to bit banging on pin
%d\n",
+ bus->adapter.name, bus->reg0 & 0xff);
I915_WRITE(GMBUS0 + reg_offset, 0);
/* Hardware may not support GMBUS over these pins? Try GPIO bitbanging
instead. */
--
1.7.7.3
