On 09/28/2012 11:25 PM, Rahul Sharma wrote:
> This patch adds support for exynos5 mixer with device tree enabled.
>
> Signed-off-by: Rahul Sharma <rahul.sharma at samsung.com>
> Signed-off-by: Fahad Kunnathadi <fahad.k at samsung.com>
> ---
>   drivers/gpu/drm/exynos/exynos_mixer.c |   41 
> ++++++++++++++++++++++++++++++--
>   drivers/gpu/drm/exynos/regs-mixer.h   |    2 +
>   2 files changed, 40 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c 
> b/drivers/gpu/drm/exynos/exynos_mixer.c
> index ff2a45d..d34562a 100644
> --- a/drivers/gpu/drm/exynos/exynos_mixer.c
> +++ b/drivers/gpu/drm/exynos/exynos_mixer.c
> @@ -645,6 +645,10 @@ static void mixer_win_reset(struct mixer_context *ctx)
>       if (ctx->vp_enabled)
>               mixer_reg_writemask(res, MXR_CFG, 0, MXR_CFG_VP_ENABLE);
>   
> +     /* enable vsync interrupt after mixer reset*/
> +     mixer_reg_writemask(res, MXR_INT_EN, MXR_INT_EN_VSYNC,
> +                     MXR_INT_EN_VSYNC);
> +

The vsync interrupt is controlled by mixer_enable_vblank() and 
mixer_disable_vblank().
After mixer reset, need to check whether it is requested to enable vblank.

>       mixer_vsync_set_update(ctx, true);
>       spin_unlock_irqrestore(&res->reg_slock, flags);
>   }
> @@ -913,6 +917,11 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg)
>   
>       /* handling VSYNC */
>       if (val & MXR_INT_STATUS_VSYNC) {
> +             if (ctx->mxr_ver == MXR_VER_16_0_33_0) {
> +                     /* layer update mandatory for mixer 16.0.33.0 */
> +                     mixer_reg_writemask(res, MXR_CFG, ~0,
> +                     MXR_CFG_LAYER_UPDATE);
> +             }
>               /* interlace scan need to check shadow register */
>               if (ctx->interlace) {
>                       base = mixer_reg_read(res, MXR_GRAPHIC_BASE(0));
> @@ -1066,6 +1075,11 @@ fail:
>       return ret;
>   }
>   
> +static struct mixer_drv_data exynos5_mxr_drv_data = {
> +     .version = MXR_VER_16_0_33_0,
> +     .is_vp_enabled = 0,
> +};
> +
>   static struct mixer_drv_data exynos4_mxr_drv_data = {
>       .version = MXR_VER_0_0_0_16,
>       .is_vp_enabled = 1,
> @@ -1075,6 +1089,18 @@ static struct platform_device_id mixer_driver_types[] 
> = {
>               .name           = "s5p-mixer",
>               .driver_data    = (unsigned long)&exynos4_mxr_drv_data,
>       }, {
> +             .name           = "exynos5-mixer",
> +             .driver_data    = (unsigned long)&exynos5_mxr_drv_data,
> +     }, {
> +             /* end node */
> +     }
> +};
> +
> +static struct of_device_id mixer_match_types[] = {
> +     {
> +             .compatible = "samsung,exynos5-mixer",
> +             .data   = &exynos5_mxr_drv_data,
> +     }, {
>               /* end node */
>       }
>   };
> @@ -1104,8 +1130,16 @@ static int __devinit mixer_probe(struct 
> platform_device *pdev)
>   
>       mutex_init(&ctx->mixer_mutex);
>   
> -     drv = (struct mixer_drv_data *)platform_get_device_id(
> -                     pdev)->driver_data;
> +     if (dev->of_node) {
> +             const struct of_device_id *match;
> +             match = of_match_node(of_match_ptr(mixer_match_types),
> +                                                       pdev->dev.of_node);
> +             drv = match->data;
> +     } else {
> +             drv = (struct mixer_drv_data *)
> +                     platform_get_device_id(pdev)->driver_data;
> +     }
> +
>       ctx->dev = &pdev->dev;
>       drm_hdmi_ctx->ctx = (void *)ctx;
>       ctx->vp_enabled = drv->is_vp_enabled;
> @@ -1167,9 +1201,10 @@ static SIMPLE_DEV_PM_OPS(mixer_pm_ops, mixer_suspend, 
> NULL);
>   
>   struct platform_driver mixer_driver = {
>       .driver = {
> -             .name = "s5p-mixer",
> +             .name = "exynos-mixer",
>               .owner = THIS_MODULE,
>               .pm = &mixer_pm_ops,
> +             .of_match_table = mixer_match_types,
>       },
>       .probe = mixer_probe,
>       .remove = __devexit_p(mixer_remove),
> diff --git a/drivers/gpu/drm/exynos/regs-mixer.h 
> b/drivers/gpu/drm/exynos/regs-mixer.h
> index fd2f4d1..6ee60be 100644
> --- a/drivers/gpu/drm/exynos/regs-mixer.h
> +++ b/drivers/gpu/drm/exynos/regs-mixer.h
> @@ -69,6 +69,7 @@
>       (((val) << (low_bit)) & MXR_MASK(high_bit, low_bit))
>   
>   /* bits for MXR_STATUS */
> +#define MXR_STATUS_SOFT_RESET                (1 << 8)
>   #define MXR_STATUS_16_BURST         (1 << 7)
>   #define MXR_STATUS_BURST_MASK               (1 << 7)
>   #define MXR_STATUS_BIG_ENDIAN               (1 << 3)
> @@ -77,6 +78,7 @@
>   #define MXR_STATUS_REG_RUN          (1 << 0)
>   
>   /* bits for MXR_CFG */
> +#define MXR_CFG_LAYER_UPDATE         (1 << 31)
>   #define MXR_CFG_RGB601_0_255                (0 << 9)
>   #define MXR_CFG_RGB601_16_235               (1 << 9)
>   #define MXR_CFG_RGB709_0_255                (2 << 9)

Reply via email to