From: Ville Syrj?l? <ville.syrj...@linux.intel.com>

Refactor the code that stores the panning x/y position into the sarea.
Make the new function intel_crtc_update_sarea_pos() available to the
atomic mode setting code.

Signed-off-by: Ville Syrj?l? <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |   43 ++++++++++++++++++++++------------
 drivers/gpu/drm/i915/intel_drv.h     |    1 +
 2 files changed, 29 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 6a5a82b..ff51171 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2166,13 +2166,39 @@ intel_finish_fb(struct drm_framebuffer *old_fb)
        return ret;
 }

+void intel_crtc_update_sarea_pos(struct drm_crtc *crtc, int x, int y)
+{
+       struct drm_device *dev = crtc->dev;
+       struct drm_i915_master_private *master_priv;
+       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+
+       if (!dev->primary->master)
+               return;
+
+       master_priv = dev->primary->master->driver_priv;
+       if (!master_priv->sarea_priv)
+               return;
+
+       switch (intel_crtc->pipe) {
+       case 0:
+               master_priv->sarea_priv->pipeA_x = x;
+               master_priv->sarea_priv->pipeA_y = y;
+               break;
+       case 1:
+               master_priv->sarea_priv->pipeB_x = x;
+               master_priv->sarea_priv->pipeB_y = y;
+               break;
+       default:
+               break;
+       }
+}
+
 static int
 intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
                    struct drm_framebuffer *fb)
 {
        struct drm_device *dev = crtc->dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
-       struct drm_i915_master_private *master_priv;
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
        struct drm_framebuffer *old_fb;
        int ret;
@@ -2224,20 +2250,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
        intel_update_fbc(dev);
        mutex_unlock(&dev->struct_mutex);

-       if (!dev->primary->master)
-               return 0;
-
-       master_priv = dev->primary->master->driver_priv;
-       if (!master_priv->sarea_priv)
-               return 0;
-
-       if (intel_crtc->pipe) {
-               master_priv->sarea_priv->pipeB_x = x;
-               master_priv->sarea_priv->pipeB_y = y;
-       } else {
-               master_priv->sarea_priv->pipeA_x = x;
-               master_priv->sarea_priv->pipeA_y = y;
-       }
+       intel_crtc_update_sarea_pos(crtc, x, y);

        return 0;
 }
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index cd6ea3b..c65c97fc 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -601,5 +601,6 @@ extern void intel_crtc_cursor_commit(struct drm_crtc *crtc, 
uint32_t handle,
                                     uint32_t addr);

 extern void intel_crtc_update_sarea(struct drm_crtc *crtc, bool enabled);
+extern void intel_crtc_update_sarea_pos(struct drm_crtc *crtc, int x, int y);

 #endif /* __INTEL_DRV_H__ */
-- 
1.7.8.6

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