This patch enables clk_set_parent() propagation for clocks used
by s5p-tv and exynos-drm drivers.

Signed-off-by: Tomasz Stanislawski <t.stanislaws at samsung.com>
---
 drivers/clk/samsung/clk-exynos4.c |    6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos4.c 
b/drivers/clk/samsung/clk-exynos4.c
index df79ca6..1f58b7c 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -605,7 +605,8 @@ static struct samsung_gate_clock exynos4_gate_clks[] 
__initdata = {
         * the device name and clock alias names specified below for some
         * of the clocks can be removed.
         */
-       GATE(sclk_hdmi, "sclk_hdmi", "mout_hdmi", SRC_MASK_TV, 0, 0, 0),
+       GATE(sclk_hdmi, "sclk_hdmi", "mout_hdmi", SRC_MASK_TV, 0,
+                       CLK_SET_PARENT_PARENT, 0),
        GATE(sclk_spdif, "sclk_spdif", "mout_spdif", SRC_MASK_PERIL1, 8, 0, 0),
        GATE(jpeg, "jpeg", "aclk160", GATE_IP_CAM, 6, 0, 0),
        GATE(mie0, "mie0", "aclk160", GATE_IP_LCD0, 1, 0, 0),
@@ -801,7 +802,8 @@ static struct samsung_gate_clock exynos4210_gate_clks[] 
__initdata = {
                        E4210_SRC_MASK_LCD1, 12, CLK_SET_RATE_PARENT, 0),
        GATE(sclk_sata, "sclk_sata", "div_sata",
                        SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0),
-       GATE(sclk_mixer, "sclk_mixer", "mout_mixer", SRC_MASK_TV, 4, 0, 0),
+       GATE(sclk_mixer, "sclk_mixer", "mout_mixer", SRC_MASK_TV, 4,
+                       CLK_SET_PARENT_PARENT, 0),
        GATE(sclk_dac, "sclk_dac", "mout_dac", SRC_MASK_TV, 8, 0, 0),
        GATE(tsadc, "tsadc", "aclk100", GATE_IP_PERIL, 15,
                        0, 0),
-- 
1.7.9.5

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