In case of using CPU interface panel, the relevant registers should be set.
So this patch adds relevant dt bindings.
Changelog v2:
- Changes "samsung,sysreg-phandle" to "samsung,sysreg"
Signed-off-by: YoungJun Cho <yj44.cho at samsung.com>
Signed-off-by: Inki Dae <inki.dae at samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park at samsung.com>
---
.../devicetree/bindings/video/samsung-fimd.txt | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/video/samsung-fimd.txt
b/Documentation/devicetree/bindings/video/samsung-fimd.txt
index 2dad41b..6ea1adc 100644
--- a/Documentation/devicetree/bindings/video/samsung-fimd.txt
+++ b/Documentation/devicetree/bindings/video/samsung-fimd.txt
@@ -44,6 +44,15 @@ Optional Properties:
- display-timings: timing settings for FIMD, as described in document [1].
Can be used in case timings cannot be provided otherwise
or to override timings provided by the panel.
+- samsung,sysreg: handle to syscon used to control the system registers
+- vidout-i80-ldi: boolean to support i80 interface instead of rgb one
+- cs-setup: clock cycles for the active period of address signal enable until
+ chip select is enable in i80 interface
+- wr-setup: clock cycles for the active period of CS signal enable until
+ write signal is enable in i80 interface
+- wr-act: clock cycles for the active period of CS enable in i80 interface
+- wr-hold: clock cycles for the active period of CS disable until write signal
+ is disable in i80 interface
The device node can contain 'port' child nodes according to the bindings
defined
in [2]. The following are properties specific to those nodes:
--
1.7.9.5
