Karl Lessard wrote:
>
>
> Jeff Hartmann wrote:
>
>> Fred Black wrote:
>>
>>> Hello everyone,
>>>
>>> I've been reading about how drm works and going through some code.
>>> To understand the whole thing I'm trying a couple of stuff. But I
>>> now need some help.
>>>
>>> I'm trying to find a way for sending some intructions through bus
>>> mastering. I understand that with drm that should be possible.
>>>
>>> Here's what I understand so far.
>>>
>>> When the X server starts with dri enabled 128 65k DMA buffers are
>>> created. So I understand that after these buffers are mapped I
>>> could reserve one of them for my own personnal use by using
>>> drmDMA(); This returns a index that I could refer to in the future.
>>>
>>> After I reserve a buffer. I'm able to have the address of where
>>> this particular buffer is situated. So what I do now is to write
>>> the instructions in that buffer in a format that the card will
>>> understand. Which is that the first DWORD is 4 index of registers
>>> and the next 4 dwords are the data that we want to put in them.
>>>
>>>
>>> Right now all I'm doing is writing to DMA_PAD. But the questions is
>>> that , after I do this how to make drm read the intructions. I was
>>> thinking that I could use drmMGAFlushVertexBuffer() but it locks
>>> up my system. Is it necessary to use some sort of locking mecanish.
>>> Or maybe I'm supposed to do something else after I do this intruction.
>>>
>>> By the way, I'm writing these intructions in SetupForSolidFills in
>>> mga_storm.c.
>>>
>>> What do you guys think? Am I going to right route? Is there another
>>> function I should be using in order to make the card read the
>>> intructions? All I want is that one 2d operation is done using bus
>>> mastering.
>>
>>
>>
>> Doing bus mastering through a secondary buffer is probably going to
>> have latency issues. What you really want is bus mastering in
>> XFree86 to use the primary dma buffer. With a little bit of work you
>> can probably get XFree86 and the kernel to both write to the primary
>> dma stream.
>>
>> That being said, you can't use the kernel mechanisms to send
>> secondary dma buffers to the card for security reasons. Currently
>> you can only send straight vertex data through the kernel
>> interfaces. That being said, if you wanted to add a root only ioctl
>> to allow you to send commands directly to the card there is no one
>> stopping you. Unfortunately we can't add a command that is not root
>> only to do the same thing for security reasons. Since XFree86 is
>> root when its configuring direct rendering this is not really an
>> issue for you.
>>
>> -Jeff
>
>
>
> Hi guys,
>
> I was interested by your conversation about bus mastering, but I don't
> understand what are the security issues about sending secondary
> buffers to the kernel. Isn't the way that the GL driver is doing? As I
> can understand, the vertex data is added to a secondary buffer, which
> is sent to the kernel via mgaFlushVertexBuffer, and then added in the
> primary buffer to be read by the vertex DMA channel. Why is it not
> possible to do the same thing in XFree86 because it runs as root?
>
> -Karl
>
The interface in the kernel forces the secondary buffer to be
OPMODE_VERTEX. It can't execute any other type of buffer through the
vertex ioctl. You have to add a new interface to do any other type of
secondary buffer.
-Jeff
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