> On Sam, 2003-02-22 at 23:04, Leif Delgass wrote:
> > On 22 Feb 2003, Michel Dänzer wrote:
> >
> > > On Sam, 2003-02-22 at 22:16, Leif Delgass wrote:
> > > > On 22 Feb 2003, Michel Dänzer wrote:
> > > > >
> > > > > I do wonder if the register writes in RADEONSetCursorPosition()
could
> > > > > interfere with the CP to cause FIFO overflows. Does anyone have an
idea
> > > > > how to determine whether writes to certain registers go through
the
> > > > > FIFO? I asked ATI devrel about this but didn't get a reply. :( The
only
> > > > > indication that these might not is that I'd expect it to cause
problems
> > > > > much more frequently if they did.
> > > >
> > > > IIRC, at least on mach64, hardware cursor position updates don't go
> > > > through the draw engine FIFO
> > >
> > > Good, that makes a lot of sense of course.
> > >
> > > > (any registers below dword offset 0x040 don't use the FIFO),
> > >
> > > Where did you find this information? Have you found anything similar
> > > about Radeons anywhere?
> >
> > It's in the register reference and programmer's guide.  I don't have
docs
> > on Radeons, so I don't know if there is a similar convention there.
>
> I can't find any in the docs I have unfortunately. The SDK PDF says 'The
> file REGDEF.H specifically outlines the registers are "FIFOed", and
> identifies the registers that can be read directly', but I don't see any
> such information in that file either. :( Maybe I'm blind...

No, you're not:) Some of reference files in the Programming Guide do not
match the actual files correctly.
Anyway, basically most registers belonging to 2D and 3D engines are FIFOed,
while the registers belonging to the display engine (like crtc, dac, cursor,
fp, palette, overlay...) are not.

Hui

>
> --
> Earthling Michel Dänzer (MrCooper)/ Debian GNU/Linux (powerpc) developer
> XFree86 and DRI project member   /  CS student, Free Software enthusiast
>
>
>
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