Hi,
I attached a patch that adds color dithering and rounding options to the
radeon and r200 drivers. I'd like to hear some comments about the
semantics of the options I chose before I commit anything and I'm not
sure I added the roundEnable flag in the right place. It is needed
because a set ROUND_ENABLE bit overrides dithering.
As a side note, the X error diffusion with reset at start of lines looks
broken on my Radeon 7500. It produces very noticable vertical patterns.
Does it work better on other cards?
Regards,
Felix
------------ __\|/__ ___ ___ -------------------------
Felix ___\_e -_/___/ __\___/ __\_____ You can do anything,
Kühling (_____\Ä/____/ /_____/ /________) just not everything
[EMAIL PROTECTED] \___/ \___/ U at the same time.
Index: common/xmlpool.h
===================================================================
RCS file: /cvs/dri/xc/xc/lib/GL/mesa/src/drv/common/xmlpool.h,v
retrieving revision 1.3
diff -u -r1.3 xmlpool.h
--- common/xmlpool.h 19 Oct 2003 14:31:05 -0000 1.3
+++ common/xmlpool.h 20 Oct 2003 21:40:08 -0000
@@ -137,6 +137,51 @@
DRI_CONF_DESC_END \
DRI_CONF_OPT_END
+#define DRI_CONF_COLOR_REDUCTION_ROUND 0
+#define DRI_CONF_COLOR_REDUCTION_DITHER 1
+#define DRI_CONF_COLOR_REDUCTION(def) \
+DRI_CONF_OPT_BEGIN_V(color_reduction,enum,def,"0:1") \
+ DRI_CONF_DESC_BEGIN(en,"Default color reduction method") \
+ DRI_CONF_ENUM(0,"Round or truncate") \
+ DRI_CONF_ENUM(1,"Dither") \
+ DRI_CONF_DESC_END \
+ DRI_CONF_DESC_BEGIN(de,"Standardmethode zur Farbreduktion") \
+ DRI_CONF_ENUM(0,"Runden oder Abschneiden") \
+ DRI_CONF_ENUM(1,"Rastern") \
+ DRI_CONF_DESC_END \
+DRI_CONF_OPT_END
+
+#define DRI_CONF_ROUND_TRUNC 0
+#define DRI_CONF_ROUND_ROUND 1
+#define DRI_CONF_ROUND_MODE(def) \
+DRI_CONF_OPT_BEGIN_V(round_mode,enum,def,"0:1") \
+ DRI_CONF_DESC_BEGIN(en,"Round or truncate colors") \
+ DRI_CONF_ENUM(0,"Truncate") \
+ DRI_CONF_ENUM(1,"Round") \
+ DRI_CONF_DESC_END \
+ DRI_CONF_DESC_BEGIN(de,"Farben runden oder abschneiden") \
+ DRI_CONF_ENUM(0,"Abschneiden") \
+ DRI_CONF_ENUM(1,"Runden") \
+ DRI_CONF_DESC_END \
+DRI_CONF_OPT_END
+
+#define DRI_CONF_DITHER_XERRORDIFF 0
+#define DRI_CONF_DITHER_XERRORDIFFRESET 1
+#define DRI_CONF_DITHER_ORDERED 2
+#define DRI_CONF_DITHER_MODE(def) \
+DRI_CONF_OPT_BEGIN_V(dither_mode,enum,def,"0:2") \
+ DRI_CONF_DESC_BEGIN(en,"Color dithering") \
+ DRI_CONF_ENUM(0,"Horizontal error diffusion") \
+ DRI_CONF_ENUM(1,"Horizontal error diffusion, reset error at line
start") \
+ DRI_CONF_ENUM(2,"Ordered 2D dithering") \
+ DRI_CONF_DESC_END \
+ DRI_CONF_DESC_BEGIN(de,"Farben rastern") \
+ DRI_CONF_ENUM(0,"Horizontale Fehlerstreuung") \
+ DRI_CONF_ENUM(1,"Horizontale Fehlerstreuung, Fehler am Zeilenanfang
zurücksetzen") \
+ DRI_CONF_ENUM(2,"Geordnete 2D Farbrasterung") \
+ DRI_CONF_DESC_END \
+DRI_CONF_OPT_END
+
/** \brief Performance-related options */
#define DRI_CONF_SECTION_PERFORMANCE \
DRI_CONF_SECTION_BEGIN \
Index: radeon/radeon_context.c
===================================================================
RCS file: /cvs/dri/xc/xc/lib/GL/mesa/src/drv/radeon/radeon_context.c,v
retrieving revision 1.48
diff -u -r1.48 radeon_context.c
--- radeon/radeon_context.c 19 Oct 2003 14:38:03 -0000 1.48
+++ radeon/radeon_context.c 20 Oct 2003 21:40:09 -0000
@@ -82,12 +82,15 @@
DRI_CONF_SECTION_END
DRI_CONF_SECTION_QUALITY
DRI_CONF_PREFERRED_BPT(0,"0,16,32")
+ DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
+ DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
+ DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
DRI_CONF_SECTION_END
DRI_CONF_SECTION_DEBUG
DRI_CONF_NO_RAST(false)
DRI_CONF_SECTION_END
DRI_CONF_END;
-const GLuint __driNConfigOptions = 5;
+const GLuint __driNConfigOptions = 8;
/* Return the width and height of the given buffer.
*/
Index: radeon/radeon_context.h
===================================================================
RCS file: /cvs/dri/xc/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h,v
retrieving revision 1.35
diff -u -r1.35 radeon_context.h
--- radeon/radeon_context.h 19 Oct 2003 14:38:03 -0000 1.35
+++ radeon/radeon_context.h 20 Oct 2003 21:40:11 -0000
@@ -95,6 +95,7 @@
struct radeon_colorbuffer_state {
GLuint clear;
GLint drawOffset, drawPitch;
+ int roundEnable;
};
Index: radeon/radeon_state.c
===================================================================
RCS file: /cvs/dri/xc/xc/lib/GL/mesa/src/drv/radeon/radeon_state.c,v
retrieving revision 1.33
diff -u -r1.33 radeon_state.c
--- radeon/radeon_state.c 19 Aug 2003 01:04:57 -0000 1.33
+++ radeon/radeon_state.c 20 Oct 2003 21:40:23 -0000
@@ -1725,8 +1725,10 @@
RADEON_STATECHANGE(rmesa, ctx );
if ( state ) {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_DITHER_ENABLE;
+ rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~rmesa->state.color.roundEnable;
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_DITHER_ENABLE;
+ rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= rmesa->state.color.roundEnable;
}
break;
Index: radeon/radeon_state_init.c
===================================================================
RCS file: /cvs/dri/xc/xc/lib/GL/mesa/src/drv/radeon/radeon_state_init.c,v
retrieving revision 1.13
diff -u -r1.13 radeon_state_init.c
--- radeon/radeon_state_init.c 16 Sep 2003 20:45:11 -0000 1.13
+++ radeon/radeon_state_init.c 20 Oct 2003 21:40:23 -0000
@@ -46,6 +46,8 @@
#include "radeon_swtcl.h"
#include "radeon_vtxfmt.h"
+#include "xmlpool.h"
+
/* =============================================================
* State initialization
*/
@@ -344,7 +346,24 @@
color_fmt |
(1<<15));
- rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_DITHER_ENABLE;
+ switch ( driQueryOptioni( &rmesa->optionCache, "dither_mode" ) ) {
+ case DRI_CONF_DITHER_XERRORDIFFRESET:
+ rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_DITHER_INIT;
+ break;
+ case DRI_CONF_DITHER_ORDERED:
+ rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_SCALE_DITHER_ENABLE;
+ break;
+ }
+ if ( driQueryOptioni( &rmesa->optionCache, "round_mode" ) ==
+ DRI_CONF_ROUND_ROUND )
+ rmesa->state.color.roundEnable = RADEON_ROUND_ENABLE;
+ else
+ rmesa->state.color.roundEnable = 0;
+ if ( driQueryOptioni (&rmesa->optionCache, "color_reduction" ) ==
+ DRI_CONF_COLOR_REDUCTION_DITHER )
+ rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_DITHER_ENABLE;
+ else
+ rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= rmesa->state.color.roundEnable;
rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET] = (rmesa->state.color.drawOffset &
RADEON_COLOROFFSET_MASK);
Index: r200/r200_context.c
===================================================================
RCS file: /cvs/dri/xc/xc/lib/GL/mesa/src/drv/r200/r200_context.c,v
retrieving revision 1.33
diff -u -r1.33 r200_context.c
--- r200/r200_context.c 19 Oct 2003 14:38:03 -0000 1.33
+++ r200/r200_context.c 20 Oct 2003 21:40:24 -0000
@@ -82,12 +82,15 @@
DRI_CONF_SECTION_END
DRI_CONF_SECTION_QUALITY
DRI_CONF_PREFERRED_BPT(0,"0,16,32")
+ DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
+ DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
+ DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
DRI_CONF_SECTION_END
DRI_CONF_SECTION_DEBUG
DRI_CONF_NO_RAST(false)
DRI_CONF_SECTION_END
DRI_CONF_END;
-const GLuint __driNConfigOptions = 5;
+const GLuint __driNConfigOptions = 8;
/* Return the width and height of the given buffer.
Index: r200/r200_context.h
===================================================================
RCS file: /cvs/dri/xc/xc/lib/GL/mesa/src/drv/r200/r200_context.h,v
retrieving revision 1.25
diff -u -r1.25 r200_context.h
--- r200/r200_context.h 19 Oct 2003 14:38:03 -0000 1.25
+++ r200/r200_context.h 20 Oct 2003 21:40:30 -0000
@@ -96,6 +96,7 @@
struct r200_colorbuffer_state {
GLuint clear;
GLint drawOffset, drawPitch;
+ int roundEnable;
};
Index: r200/r200_state.c
===================================================================
RCS file: /cvs/dri/xc/xc/lib/GL/mesa/src/drv/r200/r200_state.c,v
retrieving revision 1.17
diff -u -r1.17 r200_state.c
--- r200/r200_state.c 16 Sep 2003 20:45:08 -0000 1.17
+++ r200/r200_state.c 20 Oct 2003 21:40:31 -0000
@@ -1742,8 +1742,10 @@
R200_STATECHANGE(rmesa, ctx );
if ( state ) {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_DITHER_ENABLE;
+ rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~rmesa->state.color.roundEnable;
} else {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~R200_DITHER_ENABLE;
+ rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= rmesa->state.color.roundEnable;
}
break;
Index: r200/r200_state_init.c
===================================================================
RCS file: /cvs/dri/xc/xc/lib/GL/mesa/src/drv/r200/r200_state_init.c,v
retrieving revision 1.12
diff -u -r1.12 r200_state_init.c
--- r200/r200_state_init.c 16 Sep 2003 20:45:08 -0000 1.12
+++ r200/r200_state_init.c 20 Oct 2003 21:40:34 -0000
@@ -52,6 +52,8 @@
#include "r200_swtcl.h"
#include "r200_vtxfmt.h"
+#include "xmlpool.h"
+
/* =============================================================
* State initialization
*/
@@ -382,7 +384,24 @@
| R200_TEX_BLEND_0_ENABLE);
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = color_fmt;
- rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_DITHER_ENABLE;
+ switch ( driQueryOptioni( &rmesa->optionCache, "dither_mode" ) ) {
+ case DRI_CONF_DITHER_XERRORDIFFRESET:
+ rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_DITHER_INIT;
+ break;
+ case DRI_CONF_DITHER_ORDERED:
+ rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_SCALE_DITHER_ENABLE;
+ break;
+ }
+ if ( driQueryOptioni( &rmesa->optionCache, "round_mode" ) ==
+ DRI_CONF_ROUND_ROUND )
+ rmesa->state.color.roundEnable = R200_ROUND_ENABLE;
+ else
+ rmesa->state.color.roundEnable = 0;
+ if ( driQueryOptioni (&rmesa->optionCache, "color_reduction" ) ==
+ DRI_CONF_COLOR_REDUCTION_DITHER )
+ rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_DITHER_ENABLE;
+ else
+ rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= rmesa->state.color.roundEnable;
rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET] = (rmesa->state.color.drawOffset &
R200_COLOROFFSET_MASK);
