I just ran into another related problem. The xscreensaver demo cage (for
example) terminated with:

drmCommandWrite: -22
drmRadeonCmdBuffer: -22 (exiting)

before rendering the first frame. The kernel log shows:

[drm:radeon_check_and_fixup_packets] *ERROR* Invalid R100 texture offset
[drm:radeon_emit_packets] *ERROR* Packet verification failed
[drm:radeon_cp_cmdbuf] *ERROR* radeon_emit_packets failed

This appears to happen if the application changes some texture filter
options without triggering the _NEW_TEXTURE state bit. Therefore the
code in radeon_texstate.c doesn't set a valid texture offset in the
TXFILTER command packet. The attached patch fixes the problem for me. I
hope it doesn't break anything else.

R200 may need a similar patch.

Regards,
  Felix

On Wed, 05 Nov 2003 16:07:01 +0100
Michel Dänzer <[EMAIL PROTECTED]> wrote:

> On Wed, 2003-11-05 at 14:39, Felix Kühling wrote:
> > After a cvs update with the new radeon memory layout I get this on all
> > applications that use textures. The application reports:
> > 
> > DRM_RADEON_TEXTURE: return = -22
> >    offset=0x00c00000
> >    image width=64 height=64
> >     blit width=1024 height=8 data=0x814b400
> > 
> > In the kernel log I see:
> > 
> > [drm:radeon_cp_dispatch_texture] *ERROR* Invalid destination offset
> > 
> > This is with r100, new kernel module, new Xserver and new 3d driver. 
> 
> Thank you for the informative report.
> 
> Does this patch help? If so, the new state checking code in the DRM
> probably prevented the client from locking up the chip or worse. :) (but
> no, I didn't deliberately forget this to show that off ;)
> 
> 
> -- 
> Earthling Michel Dänzer      |     Debian (powerpc), X and DRI developer
> Software libre enthusiast    |   http://svcs.affero.net/rm.php?r=daenzer
> 


------------    __\|/__    ___     ___       -------------------------
 Felix       ___\_e -_/___/ __\___/ __\_____   You can do anything,
   Kühling  (_____\Ä/____/ /_____/ /________)  just not everything
 [EMAIL PROTECTED]       \___/   \___/   U        at the same time.
--- ./radeon/radeon_state_init.c.~1.15.~        2003-11-05 12:43:07.000000000 +0100
+++ ./radeon/radeon_state_init.c        2003-11-06 00:21:45.000000000 +0100
@@ -441,8 +441,9 @@
           (2 << RADEON_TXFORMAT_WIDTH_SHIFT) |
           (2 << RADEON_TXFORMAT_HEIGHT_SHIFT));
 
-      /* FIXME: What is this magic value? */
-      rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET] = 0x2000 << (2 * i);
+      /* Initialize the texture offset to the start of the card texture heap */
+      rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET] =
+         rmesa->radeonScreen->texOffset[RADEON_CARD_HEAP];
 
       rmesa->hw.tex[i].cmd[TEX_PP_BORDER_COLOR] = 0;
       rmesa->hw.tex[i].cmd[TEX_PP_TXCBLEND] =  

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