Quoting Alexander Stohr <[EMAIL PROTECTED]>: > not beeing totally deep into the drm-radeon driver... > > excerpt of agp command register, > when chipset is in AGPv3 mode: > bit 3, value 8: reserved > bit 2..0, value 0: agp transfer mode not yet programmed > value 1: agp transfer mode 4x > value 2: agp transfer mode 8x > value 3-7: reserved > > the sheme in the hardware is different than below proposed patch.
AGP status and command registers have the same layout (mostly). Bit 3 in AGP status is "AGP 3.0 Mode", bit 3 in AGP command is "reserverd, writes have no effect". The "mode" value here is a bit of a cross between the two. It gets its initial value from the status reg, then some bits are masked away and changed, then it gets passed back to the agp kernel driver. Kernel driver actually uses bit 3 to see if the caller means AGP 2.0 or AGP 3.0 mode and interprets the rest of it accordingly before writing it to AGP command reg. Have a look at http://lxr.linux.no/source/drivers/char/agp/generic.c?v=2.6.0-test7#L410 I'd say it's a mess. Regards, Dmitri ------------------------------------------------------- This SF.net email is sponsored by: SF.net Giveback Program. Does SourceForge.net help you be more productive? Does it help you create better code? SHARE THE LOVE, and help us help YOU! Click Here: http://sourceforge.net/donate/ _______________________________________________ Dri-devel mailing list [EMAIL PROTECTED] https://lists.sourceforge.net/lists/listinfo/dri-devel
